<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Data cache could not be invalidated after install HSE Firmware in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Data-cache-could-not-be-invalidated-after-install-HSE-Firmware/m-p/1961641#M41331</link>
    <description>&lt;P&gt;When working with ARM-based microcontrollers like the S32K3, issues related to data cache invalidation after installing HSE firmware can arise from several factors. Here&amp;nbsp;&lt;A href="https://www.receiptify.net" target="_self"&gt;SpotifyPie&lt;/A&gt; are a few potential reasons why the cache invalidation might not be working as expected after the firmware installation:&amp;nbsp;&lt;/P&gt;&lt;P&gt;1. Firmware Configuration: The HSE firmware may have modified cache settings or disabled the data cache. Check the firmware documentation or initialization code to ensure that the cache is enabled and configured correctly.&lt;/P&gt;&lt;P&gt;2. Cache Control: Ensure that the cache control registers are correctly configured after the HSE firmware installation. Sometimes firmware can reset or change configurations that affect cache behavior.&lt;/P&gt;&lt;P&gt;3. Memory Region Attributes: The memory region where the flash address resides might have different attributes after HSE installation. Ensure that the memory regions are set up with the appropriate attributes (e.g., caching policies) to allow proper cache behavior.&lt;/P&gt;&lt;P&gt;4. Data Synchronization: After modifying cache-related settings or memory regions, it may be necessary to perform additional synchronization operations, like data memory barrier (DMB) or data synchronization barrier (DSB), to ensure all memory operations are completed before proceeding.&lt;/P&gt;&lt;P&gt;5. Interrupt Handling: If the HSE firmware has altered interrupt handling, ensure that the cache invalidation command is not being interrupted or affected by other operations.&lt;/P&gt;&lt;P&gt;6. Access Permissions: The HSE firmware might have altered access permissions for the memory regions, which could prevent the cache from being invalidated correctly.&lt;/P&gt;&lt;P&gt;7. Cache Policy: The HSE firmware might have implemented a different cache policy (e.g., write-back vs. write-through) that changes how the cache interacts with memory. Verify the cache policies used in both plain S32K3 and HSE configurations.&lt;/P&gt;&lt;P&gt;To troubleshoot the issue:&lt;/P&gt;&lt;P&gt;- Review HSE Documentation: Check for any notes on cache behavior or configurations in the HSE firmware documentation.&lt;/P&gt;&lt;P&gt;- Debugging: Use debugging tools to step through the cache invalidation process and monitor register states before and after the command execution.&lt;/P&gt;&lt;P&gt;- Compare Configurations: Compare the memory and cache configurations before and after installing the HSE firmware to identify any discrepancies.&lt;/P&gt;</description>
    <pubDate>Wed, 25 Sep 2024 09:38:49 GMT</pubDate>
    <dc:creator>jennie258fitz</dc:creator>
    <dc:date>2024-09-25T09:38:49Z</dc:date>
    <item>
      <title>Data cache could not be invalidated after install HSE Firmware</title>
      <link>https://community.nxp.com/t5/S32K/Data-cache-could-not-be-invalidated-after-install-HSE-Firmware/m-p/1961616#M41330</link>
      <description>&lt;P&gt;&lt;SPAN&gt;The data cache can be invalidated by address (through 0xE000EF5C) base the ARM reference manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="zyt_0-1727255438282.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/301164i7E92B1986994A982/image-size/medium?v=v2&amp;amp;px=400" role="button" title="zyt_0-1727255438282.png" alt="zyt_0-1727255438282.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;like using command "STR R0,[R4,#0xF5C]", where&amp;nbsp;R0 stores the flash address, and R4 stores address 0xE000E000.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It works well in plain S32K3 chip, the value of&amp;nbsp;flash address changed from its real value after execute that command.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But after install HSE firmware, the value not changed, that means&amp;nbsp;data cache doesn't&amp;nbsp;invalidated.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What the reason for that? Is there any conflict between&amp;nbsp;HSE and&amp;nbsp;data cache?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 25 Sep 2024 09:26:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Data-cache-could-not-be-invalidated-after-install-HSE-Firmware/m-p/1961616#M41330</guid>
      <dc:creator>zyt</dc:creator>
      <dc:date>2024-09-25T09:26:06Z</dc:date>
    </item>
    <item>
      <title>Re: Data cache could not be invalidated after install HSE Firmware</title>
      <link>https://community.nxp.com/t5/S32K/Data-cache-could-not-be-invalidated-after-install-HSE-Firmware/m-p/1961641#M41331</link>
      <description>&lt;P&gt;When working with ARM-based microcontrollers like the S32K3, issues related to data cache invalidation after installing HSE firmware can arise from several factors. Here&amp;nbsp;&lt;A href="https://www.receiptify.net" target="_self"&gt;SpotifyPie&lt;/A&gt; are a few potential reasons why the cache invalidation might not be working as expected after the firmware installation:&amp;nbsp;&lt;/P&gt;&lt;P&gt;1. Firmware Configuration: The HSE firmware may have modified cache settings or disabled the data cache. Check the firmware documentation or initialization code to ensure that the cache is enabled and configured correctly.&lt;/P&gt;&lt;P&gt;2. Cache Control: Ensure that the cache control registers are correctly configured after the HSE firmware installation. Sometimes firmware can reset or change configurations that affect cache behavior.&lt;/P&gt;&lt;P&gt;3. Memory Region Attributes: The memory region where the flash address resides might have different attributes after HSE installation. Ensure that the memory regions are set up with the appropriate attributes (e.g., caching policies) to allow proper cache behavior.&lt;/P&gt;&lt;P&gt;4. Data Synchronization: After modifying cache-related settings or memory regions, it may be necessary to perform additional synchronization operations, like data memory barrier (DMB) or data synchronization barrier (DSB), to ensure all memory operations are completed before proceeding.&lt;/P&gt;&lt;P&gt;5. Interrupt Handling: If the HSE firmware has altered interrupt handling, ensure that the cache invalidation command is not being interrupted or affected by other operations.&lt;/P&gt;&lt;P&gt;6. Access Permissions: The HSE firmware might have altered access permissions for the memory regions, which could prevent the cache from being invalidated correctly.&lt;/P&gt;&lt;P&gt;7. Cache Policy: The HSE firmware might have implemented a different cache policy (e.g., write-back vs. write-through) that changes how the cache interacts with memory. Verify the cache policies used in both plain S32K3 and HSE configurations.&lt;/P&gt;&lt;P&gt;To troubleshoot the issue:&lt;/P&gt;&lt;P&gt;- Review HSE Documentation: Check for any notes on cache behavior or configurations in the HSE firmware documentation.&lt;/P&gt;&lt;P&gt;- Debugging: Use debugging tools to step through the cache invalidation process and monitor register states before and after the command execution.&lt;/P&gt;&lt;P&gt;- Compare Configurations: Compare the memory and cache configurations before and after installing the HSE firmware to identify any discrepancies.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Sep 2024 09:38:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Data-cache-could-not-be-invalidated-after-install-HSE-Firmware/m-p/1961641#M41331</guid>
      <dc:creator>jennie258fitz</dc:creator>
      <dc:date>2024-09-25T09:38:49Z</dc:date>
    </item>
  </channel>
</rss>

