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    <title>topic 回复： S32K148 MCAL ENET EBERR 问题 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1957695#M41143</link>
    <description>&lt;P&gt;问题进展更新 : 现在追查到MPU的 CESR 寄存器了.看起来好像是uDMA尝试访问内存时被内存保护察觉到并拦截了.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_0-1726749164182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/300029iD0CFEC0B78426512/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_0-1726749164182.png" alt="fhz2000_0-1726749164182.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_1-1726749178708.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/300030i6C6947E00E3FEE11/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_1-1726749178708.png" alt="fhz2000_1-1726749178708.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 19 Sep 2024 12:33:12 GMT</pubDate>
    <dc:creator>fhz2000</dc:creator>
    <dc:date>2024-09-19T12:33:12Z</dc:date>
    <item>
      <title>S32K148 MCAL ENET EBERR 问题</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1957588#M41134</link>
      <description>&lt;P&gt;您好 .遇到了问题.&lt;/P&gt;&lt;P&gt;以下是描述&lt;/P&gt;&lt;P&gt;目前正在配置S32K148-MCAL的Eth模块.&lt;/P&gt;&lt;P&gt;port中配置好pin脚&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_0-1726739311772.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/299995i0153AB5CC34F7DDF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_0-1726739311772.png" alt="fhz2000_0-1726739311772.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;配置eth&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_1-1726739350182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/299996i29C159464338688F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_1-1726739350182.png" alt="fhz2000_1-1726739350182.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;生成代码后 组入&lt;/P&gt;&lt;P&gt;先调用eth_init&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Eth_Init&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;Eth_Config_VS_0&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;随后使能控制器&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Eth_SetControllerMode&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;EthConf_EthCtrlConfig_EthCtrlConfig_0&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;ETH_MODE_ACTIVE&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;在此过程中&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_3-1726739557897.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/299999i93F985CC641F4898/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_3-1726739557897.png" alt="fhz2000_3-1726739557897.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Base&lt;/SPAN&gt;&lt;SPAN&gt;-&amp;gt;&lt;/SPAN&gt;&lt;SPAN&gt;ECR&lt;/SPAN&gt; &lt;SPAN&gt;|=&lt;/SPAN&gt;&lt;SPAN&gt; ((&lt;/SPAN&gt;&lt;SPAN&gt;uint32&lt;/SPAN&gt;&lt;SPAN&gt;)(&lt;/SPAN&gt;&lt;SPAN&gt;0x2U&lt;/SPAN&gt;&lt;SPAN&gt;) &lt;/SPAN&gt;&lt;SPAN&gt;|&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;0x100U&lt;/SPAN&gt;&lt;SPAN&gt;));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Base&lt;/SPAN&gt;&lt;SPAN&gt;-&amp;gt;&lt;/SPAN&gt;&lt;SPAN&gt;ECR&lt;/SPAN&gt; &lt;SPAN&gt;|=&lt;/SPAN&gt;&lt;SPAN&gt; ((&lt;/SPAN&gt;&lt;SPAN&gt;uint32&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;SPAN&gt;1U&lt;/SPAN&gt; &lt;SPAN&gt;&amp;lt;&amp;lt;&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;4U&lt;/SPAN&gt;&lt;SPAN&gt;));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;是可以正常配置ETHEREN为1的&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_5-1726740319507.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/300003i9967C554BCB48F33/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_5-1726740319507.png" alt="fhz2000_5-1726740319507.png" /&gt;&lt;/span&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;但是一旦尝试初始化收发时,便会BUS ERROR&lt;/P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_6-1726740363772.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/300005i2512DD42FC1DEC7F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_6-1726740363772.png" alt="fhz2000_6-1726740363772.png" /&gt;&lt;/span&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;后续的发送更不可能了&lt;/P&gt;&lt;P&gt;请问我该如何继续调查&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 19 Sep 2024 10:06:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1957588#M41134</guid>
      <dc:creator>fhz2000</dc:creator>
      <dc:date>2024-09-19T10:06:54Z</dc:date>
    </item>
    <item>
      <title>回复： S32K148 MCAL ENET EBERR 问题</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1957695#M41143</link>
      <description>&lt;P&gt;问题进展更新 : 现在追查到MPU的 CESR 寄存器了.看起来好像是uDMA尝试访问内存时被内存保护察觉到并拦截了.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_0-1726749164182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/300029iD0CFEC0B78426512/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_0-1726749164182.png" alt="fhz2000_0-1726749164182.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fhz2000_1-1726749178708.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/300030i6C6947E00E3FEE11/image-size/medium?v=v2&amp;amp;px=400" role="button" title="fhz2000_1-1726749178708.png" alt="fhz2000_1-1726749178708.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 19 Sep 2024 12:33:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1957695#M41143</guid>
      <dc:creator>fhz2000</dc:creator>
      <dc:date>2024-09-19T12:33:12Z</dc:date>
    </item>
    <item>
      <title>回复： S32K148 MCAL ENET EBERR 问题</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1959913#M41249</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;you can check following.&lt;BR /&gt;- be sure user buffer and buffer descriptors are properly aligned and placed into non-cacheable area. ENET_RDSR and ENET_TDSR points to beginning of buffer descriptors rings.&lt;BR /&gt;- if MPU is enabled, be sure ENET master have access to memory area where&amp;nbsp;user buffer and buffer descriptors are placed.&lt;/P&gt;
&lt;P&gt;Some comments can be seen in&amp;nbsp;&lt;A href="https://community.nxp.com/t5/S32-SDK/The-ENET-module-of-S32K148-chip-failed-to-initialize-and-the/td-p/1788630" target="_blank"&gt;https://community.nxp.com/t5/S32-SDK/The-ENET-module-of-S32K148-chip-failed-to-initialize-and-the/td-p/1788630 &lt;/A&gt;as well.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
      <pubDate>Mon, 23 Sep 2024 12:43:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1959913#M41249</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2024-09-23T12:43:13Z</dc:date>
    </item>
    <item>
      <title>问题解决</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1961232#M41310</link>
      <description>&lt;P&gt;感谢回复 问题已经 解决 原因是没配置MCAL的RM模块导致MPU模块没初始化ENET相关的内存访问权限&lt;/P&gt;</description>
      <pubDate>Wed, 25 Sep 2024 02:52:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1961232#M41310</guid>
      <dc:creator>fhz2000</dc:creator>
      <dc:date>2024-09-25T02:52:29Z</dc:date>
    </item>
    <item>
      <title>回复： S32K148 MCAL ENET EBERR 问题</title>
      <link>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1961234#M41311</link>
      <description>感谢 问题解决</description>
      <pubDate>Wed, 25 Sep 2024 02:53:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K148-MCAL-ENET-EBERR-%E9%97%AE%E9%A2%98/m-p/1961234#M41311</guid>
      <dc:creator>fhz2000</dc:creator>
      <dc:date>2024-09-25T02:53:20Z</dc:date>
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