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    <title>S32KのトピックRe: When using the S32K396 eFlexPWM to output complementary PWM, only PWMA has an output.</title>
    <link>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1957502#M41132</link>
    <description>&lt;P&gt;Thank you, I found the reason. When I enabled the error channels, the complementary channels defaulted to opening all the error channels. Although I was only using error channels 1 and 2, everything worked fine after I individually disabled error channels 3 and 4 of the complementary channels.&lt;/P&gt;</description>
    <pubDate>Thu, 19 Sep 2024 09:01:19 GMT</pubDate>
    <dc:creator>qingwang_a</dc:creator>
    <dc:date>2024-09-19T09:01:19Z</dc:date>
    <item>
      <title>When using the S32K396 eFlexPWM to output complementary PWM, only PWMA has an output.</title>
      <link>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1938373#M39994</link>
      <description>&lt;P&gt;When I use the eFlexPWM submodule 0 of the S32K396 to generate complementary PWM, the PWMA channel has output, but the PWMB channel does not. However, when I use PWMB to output PWM separately, the PWMB channel outputs normally. Below are my configurations and code in the S32DS.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Snipaste_2024-08-22_18-08-54.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294756iB017DEE39FC449A0/image-size/large?v=v2&amp;amp;px=999" role="button" title="Snipaste_2024-08-22_18-08-54.png" alt="Snipaste_2024-08-22_18-08-54.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Snipaste_2024-08-22_18-13-00.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294758i4F225731B8FF4304/image-size/large?v=v2&amp;amp;px=999" role="button" title="Snipaste_2024-08-22_18-13-00.png" alt="Snipaste_2024-08-22_18-13-00.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Snipaste_2024-08-22_18-13-20.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294754i17948CD2FD28E2D1/image-size/large?v=v2&amp;amp;px=999" role="button" title="Snipaste_2024-08-22_18-13-20.png" alt="Snipaste_2024-08-22_18-13-20.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Snipaste_2024-08-22_18-13-42.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294757i750EDB51FF4BD677/image-size/large?v=v2&amp;amp;px=999" role="button" title="Snipaste_2024-08-22_18-13-42.png" alt="Snipaste_2024-08-22_18-13-42.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Snipaste_2024-08-22_18-14-00.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294759iBB9C2CFB6BEC05C0/image-size/large?v=v2&amp;amp;px=999" role="button" title="Snipaste_2024-08-22_18-14-00.png" alt="Snipaste_2024-08-22_18-14-00.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Snipaste_2024-08-22_18-15-20.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294760i28CB2538B82272AD/image-size/large?v=v2&amp;amp;px=999" role="button" title="Snipaste_2024-08-22_18-15-20.png" alt="Snipaste_2024-08-22_18-15-20.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;*/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;/* Including necessary configuration files. */&lt;/DIV&gt;&lt;DIV&gt;#include "Mcal.h"&lt;/DIV&gt;&lt;DIV&gt;//#include "Siul2_Dio_Ip.h"&lt;/DIV&gt;&lt;DIV&gt;#include "Siul2_Port_Ip.h"&lt;/DIV&gt;&lt;DIV&gt;#include "Clock_Ip.h"&lt;/DIV&gt;&lt;DIV&gt;#include "FlexPwm_Ip.h"&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#define INSTANCE_0 (uint8)0U&lt;/DIV&gt;&lt;DIV&gt;#define SubModule_0&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;(uint8)0U&lt;/DIV&gt;&lt;DIV&gt;#define SubModule_1&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;(uint8)1U&lt;/DIV&gt;&lt;DIV&gt;#define SubModule_2&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;(uint8)2U&lt;/DIV&gt;&lt;DIV&gt;/* User includes */&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;/*!&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; \brief The main function for the project.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; \details The startup initialization sequence is the following:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - startup asm routine&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - main()&lt;/DIV&gt;&lt;DIV&gt;*/&lt;/DIV&gt;&lt;DIV&gt;int main(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; /* Write your code here */&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Clock_Ip_Init(Clock_Ip_aClockConfig);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS_PortContainer_0_BOARD_InitPeripherals, g_pin_mux_InitConfigArr_PortContainer_0_BOARD_InitPeripherals);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;FlexPwm_Ip_Init(INSTANCE_0,&amp;amp;FlexPwm_Ip_InstanceCfg_I0);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_ClearLoadValue(INSTANCE_0, 1U &amp;lt;&amp;lt; SubModule_0);&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_UpdateDutyCycle(INSTANCE_0, SubModule_0, FLEXPWM_IP_PWMA, 200);&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_LoadValue(INSTANCE_0, 1U &amp;lt;&amp;lt; SubModule_0, TRUE);&lt;/DIV&gt;&lt;DIV&gt;//&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_ClearLoadValue(INSTANCE_0, 1U &amp;lt;&amp;lt; SubModule_1);&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_UpdateDutyCycle(INSTANCE_0, SubModule_1, FLEXPWM_IP_PWMA, 0x200);&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_LoadValue(INSTANCE_0, 1U &amp;lt;&amp;lt; SubModule_1, TRUE);&lt;/DIV&gt;&lt;DIV&gt;//&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_ClearLoadValue(INSTANCE_0, 1U &amp;lt;&amp;lt; SubModule_2);&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_UpdateDutyCycle(INSTANCE_0, SubModule_2, FLEXPWM_IP_PWMA, 0x300);&lt;/DIV&gt;&lt;DIV&gt;//&amp;nbsp; &amp;nbsp; FlexPwm_Ip_LoadValue(INSTANCE_0, 1U &amp;lt;&amp;lt; SubModule_2, TRUE);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; while(1)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; {&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please tell me how to configure it so that the complementary channel PWMB outputs normally? Thank you.&lt;/P&gt;</description>
      <pubDate>Thu, 22 Aug 2024 10:18:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1938373#M39994</guid>
      <dc:creator>qingwang_a</dc:creator>
      <dc:date>2024-08-22T10:18:14Z</dc:date>
    </item>
    <item>
      <title>Re: When using the S32K396 eFlexPWM to output complementary PWM, only PWMA has an output.</title>
      <link>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1952749#M40851</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Thank you so much for your interest in our products and for using our community.&lt;/P&gt;
&lt;P&gt;You could refer to the attached project created in S32DS-S32PLATFORM v.3.5 and RTD 3.0.0 (for SW detail please refer to &lt;A href="https://www.nxp.com/document/guide/getting-started-with-s32k396-bga-dc1-evaluation-board:GS-S32K396-BGA-DC1" target="_blank" rel="noopener"&gt;Getting Started With S32K396-BGA-DC1 Evaluation Board&lt;/A&gt;).&lt;/P&gt;
&lt;P&gt;The demo outputs the PWM signals, in complementary mode, in &lt;EM&gt;PWM1_A_0 (PTC31)&lt;/EM&gt; and &lt;EM&gt;PWM1_B_0 (PTA6)&lt;/EM&gt;, you will need to use the &lt;A href="https://www.nxp.com/design/design-center/development-boards-and-designs/automotive-development-platforms/s32k-mcu-platforms/s32x-mb-i-o-extension-evaluation-board-for-real-time-domain-control-and-actuation:S32X-MB" target="_blank" rel="noopener"&gt;S32X-MB&lt;/A&gt; and connect the scope in &lt;EM&gt;P13-1&lt;/EM&gt; and &lt;EM&gt;P13-5&lt;/EM&gt;, respectively.&lt;/P&gt;
&lt;P&gt;Hope it helps you.&lt;/P&gt;
&lt;P&gt;Have a nice day!&lt;/P&gt;</description>
      <pubDate>Wed, 11 Sep 2024 23:12:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1952749#M40851</guid>
      <dc:creator>_Leo_</dc:creator>
      <dc:date>2024-09-11T23:12:07Z</dc:date>
    </item>
    <item>
      <title>Re: When using the S32K396 eFlexPWM to output complementary PWM, only PWMA has an output.</title>
      <link>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1957502#M41132</link>
      <description>&lt;P&gt;Thank you, I found the reason. When I enabled the error channels, the complementary channels defaulted to opening all the error channels. Although I was only using error channels 1 and 2, everything worked fine after I individually disabled error channels 3 and 4 of the complementary channels.&lt;/P&gt;</description>
      <pubDate>Thu, 19 Sep 2024 09:01:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/When-using-the-S32K396-eFlexPWM-to-output-complementary-PWM-only/m-p/1957502#M41132</guid>
      <dc:creator>qingwang_a</dc:creator>
      <dc:date>2024-09-19T09:01:19Z</dc:date>
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