S32KのトピックRe: S32K116_EVB Clock output

S32K116_EVB Clock output

kwakd_y — Mon, 11 Mar 2019 09:15:58 GMT

I want to use clock out with S32K116_EVB.

I seted it as follows, but it does not work.

Please respond what is the problem.

void CLKOUT_init(void)
{
PCC->PCCn[PCC_PORTB_INDEX ] |=PCC_PCCn_CGC_MASK; /* Enable clock for PORTB */
PTB->PDDR |= (1<<5); /* Data Direction= output (default) */
PORTB->PCR[5] |= PORT_PCR_MUX(5); /* Port B5: MUX = CLKOUT */

SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTSEL(8);
SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTDIV(0); //Output clock divide by 1
SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTEN(1); //Enable CLKOUT
}

Re: S32K116_EVB Clock output

dianabatrlova — Mon, 11 Mar 2019 11:39:22 GMT

Hello,

The "SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTSEL(8); " means that you have chosen the SPLLDIV2_CLK option as CLKOUT.

However, the Phase-locked loop (PLL) is not available for the S32K11x product series.

I would like to point you to the Reference Manual rev 9. section "27.2 High level clocking diagram" note number 3.

"3. For S32K11x, inputs and muxes connected to PCC are Reserved. Also, SPLLDIVx_CLK are Reserved as indicated in RED"

Best Regards,

Diana

Re: S32K116_EVB Clock output

MarvinLiu — Thu, 11 Jul 2019 05:33:55 GMT

Thanks for your suggestion!