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    <title>S32KのトピックRe: Dma transfer on S32K310</title>
    <link>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1939100#M40039</link>
    <description>thank you, good solution!</description>
    <pubDate>Fri, 23 Aug 2024 08:28:18 GMT</pubDate>
    <dc:creator>LeoYang-</dc:creator>
    <dc:date>2024-08-23T08:28:18Z</dc:date>
    <item>
      <title>Dma transfer on S32K310</title>
      <link>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1938347#M39993</link>
      <description>&lt;P&gt;&amp;nbsp;while i am testing the Dma function on S32K310, i find that the destination buffer is not updated. then tried to read the Dma status, this is the value of error register.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="LeoYang_0-1724320806973.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294745iDAA8FB64E4D636DC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="LeoYang_0-1724320806973.png" alt="LeoYang_0-1724320806973.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;this is how the variables initialized&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="LeoYang_1-1724320955411.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294747iBD0D194661EBB30E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="LeoYang_1-1724320955411.png" alt="LeoYang_1-1724320955411.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="LeoYang_2-1724320978675.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/294748i496B470BCB3EDF57/image-size/medium?v=v2&amp;amp;px=400" role="button" title="LeoYang_2-1724320978675.png" alt="LeoYang_2-1724320978675.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 22 Aug 2024 10:04:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1938347#M39993</guid>
      <dc:creator>LeoYang-</dc:creator>
      <dc:date>2024-08-22T10:04:04Z</dc:date>
    </item>
    <item>
      <title>Re: Dma transfer on S32K310</title>
      <link>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1939096#M40038</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/225112"&gt;@LeoYang-&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;As per the debug session that I checked with you, we can conclude that the cause is: somehow, the&amp;nbsp;CH0_ES[ERR] bit was set before calling the Dma_Ip_Init() function, and after, the destination address and source address can't be written into the DADDR and SADDR registers by Dma_Ip_SetLogicChannelTransferList() function.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;This is the solution: write 1 to clear the&amp;nbsp;CH0_ES[ERR] bit before calling the Dma_Ip_Init() function.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Dan&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 23 Aug 2024 08:22:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1939096#M40038</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2024-08-23T08:22:21Z</dc:date>
    </item>
    <item>
      <title>Re: Dma transfer on S32K310</title>
      <link>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1939100#M40039</link>
      <description>thank you, good solution!</description>
      <pubDate>Fri, 23 Aug 2024 08:28:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Dma-transfer-on-S32K310/m-p/1939100#M40039</guid>
      <dc:creator>LeoYang-</dc:creator>
      <dc:date>2024-08-23T08:28:18Z</dc:date>
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