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    <title>topic Re: s32k spi send message in S32K</title>
    <link>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857767#M3682</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks, the problem has been solved, I disable the PCS function, the way the CS pin passes GPIO。But I don't know if I have a problem with this operation.&lt;/P&gt;&lt;P&gt;PCC-&amp;gt;PCCn[PCC_PORTB_INDEX ]|=PCC_PCCn_CGC_MASK; /* Enable clock for PORTB */&lt;BR /&gt; PORTB-&amp;gt;PCR[2]|=PORT_PCR_MUX(3); /* Port B2: MUX = ALT3, LPSPI1_SCK */&lt;BR /&gt; PORTB-&amp;gt;PCR[3]|=PORT_PCR_MUX(3); /* Port B3: MUX = ALT3, LPSPI1_SIN */&lt;BR /&gt; PORTB-&amp;gt;PCR[4]|=PORT_PCR_MUX(3); /* Port B4: MUX = ALT3, LPSPI1_SOUT */&lt;BR /&gt; &lt;BR /&gt; PORTB-&amp;gt;PCR[5]|=PORT_PCR_MUX(1); /* Port B5: MUX = ALT1, LPSPI1_PCS1 */ &lt;BR /&gt; PTB-&amp;gt;PDDR |= (1&amp;lt;&amp;lt;5);&lt;BR /&gt; PTB-&amp;gt;PSOR |= (1&amp;lt;&amp;lt;5);&lt;BR /&gt; &lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable clocks to modify PCS ( default) */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] = PCC_PCCn_PR_MASK&lt;BR /&gt; | PCC_PCCn_PCS(2) /* Enable PCS=SIRC (8 MHz func'l clock) */&lt;BR /&gt; | PCC_PCCn_CGC_MASK; /* Enable clock for LPSPI regs */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; LPSPI_Disable(LPSPI0); /* Disable module for configuration */&lt;BR /&gt; LPSPI_SetIntMode(LPSPI0,LPSPI_ALL_STATUS,false); /* Interrupts not used */&lt;BR /&gt; LPSPI_SetTxDmaCmd(LPSPI0,false); /* DMA not used */&lt;BR /&gt; LPSPI_SetRxDmaCmd(LPSPI0,false); /* DMA not used */&lt;BR /&gt; LPSPI_SetMasterSlaveMode(LPSPI0, LPSPI_MASTER); /* Set for master mode */ &lt;BR /&gt; LPSPI_SetPinConfigMode(LPSPI0, LPSPI_SDI_IN_SDO_OUT, LPSPI_DATA_OUT_RETAINED, false); &lt;BR /&gt; LPSPI_ClearStatusFlag(LPSPI0,LPSPI_ALL_STATUS);&lt;/P&gt;&lt;P&gt;LPSPI_SetBaudRateDivisor(LPSPI0,2); /* SCKDIV=8: SCK divider =2+2 = 4 (1 usec: 500000 baud rate) */&lt;BR /&gt; LPSPI_SetDelay(LPSPI0, LPSPI_SCK_TO_PCS, 4); /* SCKPCS=4: SCK to PCS delay = 4+1 = 5 (500 nsec) */&lt;BR /&gt; LPSPI_SetDelay(LPSPI0, LPSPI_PCS_TO_SCK,9); /* PCSSCK=9: PCS to SCK delay = 9+1 = 10 (1 usec) */&lt;BR /&gt; LPSPI_SetDelay(LPSPI0, LPSPI_BETWEEN_TRANSFER, 8);/* DBT=8: Delay between Transfers = 8+2 = 10 (1 usec) */&lt;BR /&gt; //LPSPI_SetPcsPolarityMode(LPSPI0,LPSPI_PCS1 ,LPSPI_ACTIVE_LOW);&lt;BR /&gt; LPSPI_SetSamplingPoint(LPSPI0, false);&lt;/P&gt;&lt;P&gt;LPSPI_SetRxWatermarks(LPSPI0,0); /* RXWATER=0: Rx flags set when Rx FIFO &amp;gt;0 */&lt;BR /&gt; LPSPI_SetTxWatermarks(LPSPI0,3); /* TXWATER=3: Tx flags set when Tx FIFO &amp;lt;= 3 */&lt;BR /&gt; LPSPI_SetTxCommandReg(LPSPI0,&amp;amp;Spi_TxCmdCfgSet);&lt;/P&gt;&lt;P&gt;LPSPI_Enable(LPSPI0); /* Enable module for operation */&lt;BR /&gt; /* DBGEN=1: module enabled in debug mode */&lt;BR /&gt; /* DOZEN=0: module enabled in Doze mode */&lt;BR /&gt; /* RST=0: Master logic not reset */&lt;BR /&gt; /* MEN=1: Module is enabled */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Select sFLASH: Chip Select pin low */&lt;BR /&gt;#define OL_SDK_sFLASH_CS_LOW() OLA_SDK_GPIO_ResetBits(PTB,PIN5_IDX)&lt;BR /&gt;/* Deselect sFLASH: Chip Select pin high */&lt;BR /&gt;#define OL_SDK_sFLASH_CS_HIGH() OLA_SDK_GPIO_SetBits(PTB,PIN5_IDX)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 16 Feb 2019 02:49:51 GMT</pubDate>
    <dc:creator>liulei1</dc:creator>
    <dc:date>2019-02-16T02:49:51Z</dc:date>
    <item>
      <title>s32k spi send message</title>
      <link>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857764#M3679</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I want to send a message, but the oscilloscope can only see CS pull low and CLK waveform, SIN and SOUT have no waveform.&lt;/P&gt;&lt;P&gt;uint8_t OLA_SDK_LPSPI_WirteRead(LPSPI_Type * base,uint8_t Send_Value)&lt;BR /&gt;{&lt;BR /&gt; uint8_t DataValue = 0;&lt;BR /&gt;&lt;BR /&gt; while(!(LPSPI_GetStatusFlag(base,LPSPI_TX_DATA_FLAG))); /* Wait for Tx FIFO available */&lt;BR /&gt; LPSPI_WriteData(base,Send_Value); /* Transmit data */&lt;BR /&gt; LPSPI_ClearStatusFlag(base,LPSPI_TX_DATA_FLAG); /* Clear TDF flag -- LPSPI1-&amp;gt;SR |= LPSPI_SR_TDF_MASK; */&lt;/P&gt;&lt;P&gt;while(!(LPSPI_GetStatusFlag(base,LPSPI_RX_DATA_FLAG))); /* Wait at least one RxFIFO entry */&lt;BR /&gt; DataValue= LPSPI_ReadData(base); /* Read received data */&lt;BR /&gt; LPSPI_ClearStatusFlag(base,LPSPI_WORD_COMPLETE); /* Clear RDF flag */&lt;BR /&gt; LPSPI_ClearStatusFlag(base,LPSPI_RX_DATA_FLAG); /* Clear RDF flag */&lt;BR /&gt; return DataValue;&lt;BR /&gt;}&lt;span class="lia-inline-image-display-wrapper" image-alt="微信图片_20190212201011.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/72170i26C71BDF843BD270/image-size/large?v=v2&amp;amp;px=999" role="button" title="微信图片_20190212201011.jpg" alt="微信图片_20190212201011.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;See the attached code.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2019 12:12:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857764#M3679</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-02-12T12:12:42Z</dc:date>
    </item>
    <item>
      <title>Re: s32k spi send message</title>
      <link>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857765#M3680</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Lei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried to take a look over your project but is hard to check it because you mix register write, public API and hardware abstraction layer which shouldn't be used by application layer.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I think the problem is on your pins configuration. I don't see where pins direction is configured in&amp;nbsp;OL_SDK_LPSPI_Init, there is configured just mux for your signals.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Razvan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2019 13:22:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857765#M3680</guid>
      <dc:creator>razva_tilimpea</dc:creator>
      <dc:date>2019-02-12T13:22:27Z</dc:date>
    </item>
    <item>
      <title>Re: s32k spi send message</title>
      <link>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857766#M3681</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;Do you know how to configure SPI corresponding registers before you use SPI.&lt;/P&gt;&lt;P&gt;You need to check the manual how to configure the register bits exactly.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;BTW, use your multimeter to check the power circuit part and other important circuit parts to check if the oscillator works normally or not.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thomson&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Feb 2019 23:31:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857766#M3681</guid>
      <dc:creator>thomsonzhou</dc:creator>
      <dc:date>2019-02-14T23:31:19Z</dc:date>
    </item>
    <item>
      <title>Re: s32k spi send message</title>
      <link>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857767#M3682</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks, the problem has been solved, I disable the PCS function, the way the CS pin passes GPIO。But I don't know if I have a problem with this operation.&lt;/P&gt;&lt;P&gt;PCC-&amp;gt;PCCn[PCC_PORTB_INDEX ]|=PCC_PCCn_CGC_MASK; /* Enable clock for PORTB */&lt;BR /&gt; PORTB-&amp;gt;PCR[2]|=PORT_PCR_MUX(3); /* Port B2: MUX = ALT3, LPSPI1_SCK */&lt;BR /&gt; PORTB-&amp;gt;PCR[3]|=PORT_PCR_MUX(3); /* Port B3: MUX = ALT3, LPSPI1_SIN */&lt;BR /&gt; PORTB-&amp;gt;PCR[4]|=PORT_PCR_MUX(3); /* Port B4: MUX = ALT3, LPSPI1_SOUT */&lt;BR /&gt; &lt;BR /&gt; PORTB-&amp;gt;PCR[5]|=PORT_PCR_MUX(1); /* Port B5: MUX = ALT1, LPSPI1_PCS1 */ &lt;BR /&gt; PTB-&amp;gt;PDDR |= (1&amp;lt;&amp;lt;5);&lt;BR /&gt; PTB-&amp;gt;PSOR |= (1&amp;lt;&amp;lt;5);&lt;BR /&gt; &lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable clocks to modify PCS ( default) */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_LPSPI0_INDEX] = PCC_PCCn_PR_MASK&lt;BR /&gt; | PCC_PCCn_PCS(2) /* Enable PCS=SIRC (8 MHz func'l clock) */&lt;BR /&gt; | PCC_PCCn_CGC_MASK; /* Enable clock for LPSPI regs */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; LPSPI_Disable(LPSPI0); /* Disable module for configuration */&lt;BR /&gt; LPSPI_SetIntMode(LPSPI0,LPSPI_ALL_STATUS,false); /* Interrupts not used */&lt;BR /&gt; LPSPI_SetTxDmaCmd(LPSPI0,false); /* DMA not used */&lt;BR /&gt; LPSPI_SetRxDmaCmd(LPSPI0,false); /* DMA not used */&lt;BR /&gt; LPSPI_SetMasterSlaveMode(LPSPI0, LPSPI_MASTER); /* Set for master mode */ &lt;BR /&gt; LPSPI_SetPinConfigMode(LPSPI0, LPSPI_SDI_IN_SDO_OUT, LPSPI_DATA_OUT_RETAINED, false); &lt;BR /&gt; LPSPI_ClearStatusFlag(LPSPI0,LPSPI_ALL_STATUS);&lt;/P&gt;&lt;P&gt;LPSPI_SetBaudRateDivisor(LPSPI0,2); /* SCKDIV=8: SCK divider =2+2 = 4 (1 usec: 500000 baud rate) */&lt;BR /&gt; LPSPI_SetDelay(LPSPI0, LPSPI_SCK_TO_PCS, 4); /* SCKPCS=4: SCK to PCS delay = 4+1 = 5 (500 nsec) */&lt;BR /&gt; LPSPI_SetDelay(LPSPI0, LPSPI_PCS_TO_SCK,9); /* PCSSCK=9: PCS to SCK delay = 9+1 = 10 (1 usec) */&lt;BR /&gt; LPSPI_SetDelay(LPSPI0, LPSPI_BETWEEN_TRANSFER, 8);/* DBT=8: Delay between Transfers = 8+2 = 10 (1 usec) */&lt;BR /&gt; //LPSPI_SetPcsPolarityMode(LPSPI0,LPSPI_PCS1 ,LPSPI_ACTIVE_LOW);&lt;BR /&gt; LPSPI_SetSamplingPoint(LPSPI0, false);&lt;/P&gt;&lt;P&gt;LPSPI_SetRxWatermarks(LPSPI0,0); /* RXWATER=0: Rx flags set when Rx FIFO &amp;gt;0 */&lt;BR /&gt; LPSPI_SetTxWatermarks(LPSPI0,3); /* TXWATER=3: Tx flags set when Tx FIFO &amp;lt;= 3 */&lt;BR /&gt; LPSPI_SetTxCommandReg(LPSPI0,&amp;amp;Spi_TxCmdCfgSet);&lt;/P&gt;&lt;P&gt;LPSPI_Enable(LPSPI0); /* Enable module for operation */&lt;BR /&gt; /* DBGEN=1: module enabled in debug mode */&lt;BR /&gt; /* DOZEN=0: module enabled in Doze mode */&lt;BR /&gt; /* RST=0: Master logic not reset */&lt;BR /&gt; /* MEN=1: Module is enabled */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Select sFLASH: Chip Select pin low */&lt;BR /&gt;#define OL_SDK_sFLASH_CS_LOW() OLA_SDK_GPIO_ResetBits(PTB,PIN5_IDX)&lt;BR /&gt;/* Deselect sFLASH: Chip Select pin high */&lt;BR /&gt;#define OL_SDK_sFLASH_CS_HIGH() OLA_SDK_GPIO_SetBits(PTB,PIN5_IDX)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 16 Feb 2019 02:49:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k-spi-send-message/m-p/857767#M3682</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-02-16T02:49:51Z</dc:date>
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