<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: About Interrupt while erasing and writting DFLASH and PFLASH</title>
    <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857465#M3671</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;Thanks for your help.&lt;/P&gt;&lt;P&gt;I use S32K144, Pflash size is 512K Bytes.&lt;/P&gt;&lt;P&gt;I still have a doubt, if I Erase and Program the Pflash, must the&amp;nbsp;&lt;SPAN&gt;Erase and Program code in the RAM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What I means is : Must I put the&amp;nbsp;&amp;nbsp;Erase and Program Pflash codes in RAM and run the erase and program Pflash code from RAM?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 17 Apr 2019 09:58:02 GMT</pubDate>
    <dc:creator>赵子成</dc:creator>
    <dc:date>2019-04-17T09:58:02Z</dc:date>
    <item>
      <title>About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857461#M3667</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, All&lt;/P&gt;&lt;P&gt;When&amp;nbsp;erasing and writting DFLASH and PFLASH, is it necessary to disable all the interrupt and recover the interrupt after finishing&amp;nbsp;&lt;SPAN&gt;erasing and writting DFLASH and PFLASH?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Jan 2019 08:58:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857461#M3667</guid>
      <dc:creator>赵子成</dc:creator>
      <dc:date>2019-01-07T08:58:22Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857462#M3668</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;It depends on where the interrupt vector table and the interrupt routines are located.&lt;BR /&gt;Because if there are located on the same flash block, they cannot be called while there is a program/erase operation in progress on the same block.&lt;BR /&gt;Please take a look at 36.5.9.4 Allowed simultaneous flash operations and 36.1.9 Simultaneous operations on PFLASH read partitions, S32K11x RM rev.9.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Jan 2019 13:50:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857462#M3668</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2019-01-07T13:50:54Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857463#M3669</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Daniel&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;What I want to ask is that If I Enable all interrupts(like the PIT and CAN interrupt and so on),Can I erase or program the PFLASH and DFLASH at the same time?&lt;/P&gt;&lt;P&gt;Or must I disable all the interrupts before&amp;nbsp;&lt;SPAN&gt;erase or program the PFLASH and DFLASH?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thanks.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Jan 2019 01:43:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857463#M3669</guid>
      <dc:creator>赵子成</dc:creator>
      <dc:date>2019-01-08T01:43:22Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857464#M3670</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;What S32K1xx derivative do you have? S32K116/118/142/144&amp;nbsp;have only one PFlash block.&lt;/P&gt;&lt;P&gt;Basically, you can't read/execute code from&amp;nbsp;a PFlash block when there is a flash operation (erasing/programming) on the PFlash block in progress. So, if you have the interrupt table or the ISRs functions in the block or the ISR read some data from the PFlash block, you must disable the interrupts before the PFlash operation. Avoid&amp;nbsp;any simultaneous access to the block. Similarly for DFlash.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Jan 2019 15:13:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857464#M3670</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2019-01-09T15:13:32Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857465#M3671</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;Thanks for your help.&lt;/P&gt;&lt;P&gt;I use S32K144, Pflash size is 512K Bytes.&lt;/P&gt;&lt;P&gt;I still have a doubt, if I Erase and Program the Pflash, must the&amp;nbsp;&lt;SPAN&gt;Erase and Program code in the RAM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What I means is : Must I put the&amp;nbsp;&amp;nbsp;Erase and Program Pflash codes in RAM and run the erase and program Pflash code from RAM?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Apr 2019 09:58:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857465#M3671</guid>
      <dc:creator>赵子成</dc:creator>
      <dc:date>2019-04-17T09:58:02Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857466#M3672</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Only this:&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;FTFC-&amp;gt;FSTAT = FTFC_FSTAT_CCIF_MASK;               // launch command
while((FTFC-&amp;gt;FSTAT &amp;amp; FTFC_FSTAT_CCIF_MASK) == 0); // wait until complete&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;BR, Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Apr 2019 10:13:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857466#M3672</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2019-04-17T10:13:03Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857467#M3673</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;OK， I know, I can see the SDK codes like this :&lt;/P&gt;&lt;P&gt;START_FUNCTION_DEFINITION_RAMSECTION&lt;/P&gt;&lt;P&gt;static status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t * pSSDConfig)&lt;/P&gt;&lt;P&gt;END_FUNCTION_DEFINITION_RAMSECTION&lt;/P&gt;&lt;P&gt;That means it is in the RAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 May 2019 07:56:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/857467#M3673</guid>
      <dc:creator>赵子成</dc:creator>
      <dc:date>2019-05-07T07:56:01Z</dc:date>
    </item>
    <item>
      <title>Re: About Interrupt while erasing and writting DFLASH and PFLASH</title>
      <link>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/1865215#M35322</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hi Daniel,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;I enable an interrupt of 100us per cycle. Then I erase one sector of data flash.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I called an API function called "C40_Ip_MainInterfaceSectorErase"&amp;nbsp; to erase data flash&lt;/P&gt;&lt;P&gt;During erasure, interrupts cannot be responded to.&lt;/P&gt;&lt;P&gt;After erasure,&amp;nbsp;interrupts can be responded to normally.&lt;/P&gt;&lt;P&gt;So,&amp;nbsp;how to achieve the goal to enter interrupts while erasing data flash?&lt;/P&gt;&lt;P&gt;Looking forward to your reply&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 14 May 2024 08:57:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-Interrupt-while-erasing-and-writting-DFLASH-and-PFLASH/m-p/1865215#M35322</guid>
      <dc:creator>WenWenDar</dc:creator>
      <dc:date>2024-05-14T08:57:51Z</dc:date>
    </item>
  </channel>
</rss>

