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    <title>topic Re: S32K344 lwip with DCache enabled in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1877422#M35974</link>
    <description>&lt;P&gt;hi Ola ,&lt;/P&gt;&lt;P&gt;i'm just wondering where exactly did you append that one ?&lt;/P&gt;&lt;P&gt;i'm stuck with the same issue and couldn't find the exact fix for it&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thank you&lt;/P&gt;</description>
    <pubDate>Wed, 29 May 2024 15:42:03 GMT</pubDate>
    <dc:creator>yosri_c</dc:creator>
    <dc:date>2024-05-29T15:42:03Z</dc:date>
    <item>
      <title>S32K344 lwip with DCache enabled</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1840440#M33786</link>
      <description>&lt;P&gt;(Using DS 3.5, latest RTD and latest lwip)&lt;/P&gt;&lt;P&gt;I have a working lwip project running and now need to also enable data cache with compiler flag&amp;nbsp;&lt;SPAN&gt;D_CACHE_ENABLE.&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;However, as soon as I enable it, the lwip functionality is lost. The UM and IM for Gmac seem to state that it should be possible but I cannot understand exactly how. Gmac_Ip_Cfg data is placed in non cachable RAM and still it does not work. I disabled the flag&amp;nbsp;&lt;SPAN&gt;-fdata-sections to make Cfg data end up in non cachable RAM (0x2043xxxx).&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Is there example code for how to make lwip work together with dcache?&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;Regards&lt;/DIV&gt;&lt;DIV&gt;/Ola&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 04 Apr 2024 06:06:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1840440#M33786</guid>
      <dc:creator>ola_gook</dc:creator>
      <dc:date>2024-04-04T06:06:42Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 lwip with DCache enabled</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1840487#M33790</link>
      <description>&lt;P&gt;I managed to get one step closer to the solution.&lt;/P&gt;&lt;P&gt;I found another similar issue where the proposed solution was to make sure the lwip heap is placed in non_cachable ram. Unfortunately, the detailed solution using S32DS was not possible to see due to bad resolution in attached image.&lt;/P&gt;&lt;P&gt;Instead, I did this temporarily by simply appending in mem.c:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;LWIP_DECLARE_MEMORY_ALIGNED&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;ram_heap&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;MEM_SIZE_ALIGNED&lt;/SPAN&gt; &lt;SPAN&gt;+&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;2U&lt;/SPAN&gt; &lt;SPAN&gt;*&lt;/SPAN&gt; &lt;SPAN&gt;SIZEOF_STRUCT_MEM&lt;/SPAN&gt;&lt;SPAN&gt;))&lt;/SPAN&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;((&lt;/SPAN&gt;&lt;SPAN&gt;section&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;".mcal_bss_no_cacheable"&lt;/SPAN&gt;&lt;SPAN&gt;)));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I also made sure that the Gmac_Ip_Cfg.o elements are placed in non_cachable RAM by building without&amp;nbsp;&lt;SPAN&gt;-fdata-sections&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Current result is that pinging it (or connecting to port 80 with a browser, same result) works about 60% of the time.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thus, I get the feeling that there is some more data that needs to put in non_cachable RAM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Any suggestions?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 04 Apr 2024 07:35:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1840487#M33790</guid>
      <dc:creator>ola_gook</dc:creator>
      <dc:date>2024-04-04T07:35:17Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 lwip with DCache enabled</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1843623#M33985</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/138697"&gt;@ola_gook&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can take a look at this post:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K/S32K344-S32K324-TCPIP-STACK-Intergration/m-p/1527082/highlight/true#M17897" target="_blank"&gt;https://community.nxp.com/t5/S32K/S32K344-S32K324-TCPIP-STACK-Intergration/m-p/1527082/highlight/true#M17897&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;There's step by step guide including demo application which contains these changes.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Wed, 10 Apr 2024 06:16:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1843623#M33985</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-04-10T06:16:21Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 lwip with DCache enabled</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1877422#M35974</link>
      <description>&lt;P&gt;hi Ola ,&lt;/P&gt;&lt;P&gt;i'm just wondering where exactly did you append that one ?&lt;/P&gt;&lt;P&gt;i'm stuck with the same issue and couldn't find the exact fix for it&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thank you&lt;/P&gt;</description>
      <pubDate>Wed, 29 May 2024 15:42:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-lwip-with-DCache-enabled/m-p/1877422#M35974</guid>
      <dc:creator>yosri_c</dc:creator>
      <dc:date>2024-05-29T15:42:03Z</dc:date>
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