topic Re: Unable to debug S32K324 using S32 Design Studio and JLink Base in S32K

Unable to debug S32K324 using S32 Design Studio and JLink Base

yeshvanth-m — Mon, 04 Mar 2024 18:09:56 GMT

I'm trying to flash and debug the sample program for the NXP S32K324 Triple Permanent Magnet Synchronous Motor Control Reference Design Board. I'm using a SEGGER J-Link Base debugger, the debugger can detect the core - I tried it via the JLink commander as well, but when I try to launch the debug session it always throws an error saying the JLink GDB Server is unable to halt the core. Here is a snapshot of the complete log.

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

Julián_AragónM — Mon, 04 Mar 2024 22:09:19 GMT

Hi @yeshvanth-m,

Please take a look into the NXP S32K3xx - SEGGER Wiki. Here, you can find the supported regions for the S32K324, as well as an example and a script for SystemView.

Best regards,
Julián

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

Jeremy_He — Wed, 27 Mar 2024 02:37:24 GMT

Could you try update the newest Jlink driver and make sure it gets updated in the S32DS installation folder.

This is the log when I debug S32K324 with Jlink at my side. And make sure the GDB port of the 2 core debug instance need to be different.

SEGGER J-Link GDB Server V7.66g Command Line Version

JLinkARM.dll V7.66g (DLL compiled Jul 7 2022 10:35:46)

Command line: -if swd -device S32K312 -endian little -speed 1000 -port 2334 -swoport 2335 -telnetport 2336 -vd -ir -localhostonly 1 -singlerun -strict -timeout 0 -nogui
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2334
SWO raw output listening port: 2335
Terminal I/O port: 2336
Accept remote connection: localhost only
Generate logfile: off
Verify download: on
Init regs on start: on
Silent mode: off
Single run mode: on
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: none
J-Link settings file: none
------Target related settings------
Target device: S32K312
Target interface: SWD
Target interface speed: 1000kHz
Target endian: little

Connecting to J-Link...
J-Link is connected.
Firmware: J-Trace PRO V2 Cortex compiled Jun 6 2023 10:51:28
Hardware: V2.00
S/N: 932000126
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
Checking target voltage...
Target voltage: 4.90 V
Listening on TCP/IP port 2334
Connecting to target...
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x00000000 (Data = 0x00000000)
Read 2 bytes @ address 0x00000000 (Data = 0x0000)
Received monitor command: speed 1000
Target interface speed set to 1000 kHz
Received monitor command: clrbp
Received monitor command: reset
Resetting target
Received monitor command: halt
Halting target CPU...
...Target halted (PC = 0x00402420)
Received monitor command: regs
R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
R12= 00000000, R13= 20010000, MSP= 20010000, PSP= 00000000
R14(LR) = FFFFFFFF, R15(PC) = 00402420
XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000
CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00

Security extension regs:
MSP_S = 00000000, MSPLIM_S = 00000000
PSP_S = 00000000, PSPLIM_S = 00000000
MSP_NS = 20010000, MSPLIM_NS = 00000000
PSP_NS = 00000000, PSPLIM_NS = 00000000
CONTROL_S 00, FAULTMASK_S 00, BASEPRI_S 00, PRIMASK_S 00
CONTROL_NS 00, FAULTMASK_NS 00, BASEPRI_NS 00, PRIMASK_NS 00

Reading all registers
Received monitor command: speed auto
Select auto target interface speed (2000 kHz)
Received monitor command: flash breakpoints 1
Flash breakpoints enabled
Received monitor command: semihosting enable
Semi-hosting enabled (Handle on BKPT)
Received monitor command: semihosting IOClient 1
Semihosting I/O set to TELNET Client
Received monitor command: SWO DisableTarget 0xFFFFFFFF
SWO disabled successfully.
Received monitor command: SWO EnableTarget 0 0 0x1 0
SWO enabled successfully.
Read 4 bytes @ address 0x00402420 (Data = 0xF04FB672)
Read 2 bytes @ address 0x00402420 (Data = 0xB672)
Downloading 16208 bytes @ address 0x00600000 - Verify failed
Downloading 3944 bytes @ address 0x00603F50 - Verify failed
Downloading 156 bytes @ address 0x00604EB8 - Verify failed
Downloading 260 bytes @ address 0x00604F54 - Verify failed
Writing register (PC = 0x 600420)
Read 4 bytes @ address 0x00600420 (Data = 0xFFFFFFFF)
Read 2 bytes @ address 0x00600420 (Data = 0xFFFF)
Read 2 bytes @ address 0x00600422 (Data = 0xFFFF)
Reading 64 bytes @ address 0x00600580
Read 2 bytes @ address 0x0060058A (Data = 0xFFFF)
Received monitor command: clrbp
Received monitor command: reset
Resetting target
Received monitor command: halt
Halting target CPU...
...Target halted (PC = 0x00402420)
Read 2 bytes @ address 0x0060058A (Data = 0xFFFF)
Received monitor command: regs
R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
R12= 00000000, R13= 20010000, MSP= 20010000, PSP= 00000000
R14(LR) = FFFFFFFF, R15(PC) = 00402420
XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000
CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00

Reading all registers
Setting breakpoint @ address 0x0060058A, Size = 2, BPHandle = 0x0001
Starting target CPU...
Debugger requested to halt target...
...Target halted (PC = 0x004025E6)
Reading all registers
Removing breakpoint @ address 0x0060058A, Size = 2
Read 4 bytes @ address 0x004025E6 (Data = 0x2A00681A)
Read 2 bytes @ address 0x004025E6 (Data = 0x681A)
Starting target CPU...
Debugger requested to halt target...
...Target halted (PC = 0x004025E6)
Reading all registers
Read 4 bytes @ address 0x004025E6 (Data = 0x2A00681A)
Read 2 bytes @ address 0x004025E6 (Data = 0x681A)
Read 4 bytes @ address 0x0040256E (Data = 0xE7FEBF00)
Read 2 bytes @ address 0x0040256E (Data = 0xBF00)
Read 4 bytes @ address 0x0040256E (Data = 0xE7FEBF00)
Read 2 bytes @ address 0x0040256E (Data = 0xBF00)
Read 4 bytes @ address 0x402AC200 (Data = 0x00000000)
Reading 12 bytes @ address 0x402AC208
Reading 68 bytes @ address 0x402AC300
Reading 12 bytes @ address 0x402AC348
Read 4 bytes @ address 0x402AC400 (Data = 0x00000400)
Read 4 bytes @ address 0x402AC408 (Data = 0x00000000)
Reading 32 bytes @ address 0x402AC504
Reading 8 bytes @ address 0x402AC600
Reading 8 bytes @ address 0x402AC60C
Reading 16 bytes @ address 0x402AC700
Read 4 bytes @ address 0x402DC334 (Data = 0x1CFE2FFC)
Starting target CPU...

Best Regards,

Jeremy

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

yeshvanth-m — Wed, 06 Mar 2024 02:33:28 GMT

Hi Jeremy,

Thanks for your response. But the problem still exists. I will provide all the configurations I used for better understanding.

With SWD and port ID 2334 as you suggested I get this error:

Same error with JTAG as well

What code is flashed at the factory? Is it something to do with corrupted code? Not sure about it.

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

yeshvanth-m — Wed, 06 Mar 2024 02:37:51 GMT

Hi Jeremy,

Thanks for your response. But the problem still exists. I will provide all the configurations I used for better understanding.

With SWD and port ID 2334 as you suggested I get this error:

Same error with JTAG as well

What code is flashed at the factory? Is it something to do with corrupted code? Not sure about it.

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

artiom — Tue, 26 Mar 2024 19:25:28 GMT

In current implementation of S32DS, JLink server is a minimal set of binaries which might not work correctly. In order to address this issue, download https://www.segger.com/downloads/jlink/ latest version x64, install and browse to installed location, ex: C:\Program Files\SEGGER\JLink and pick JLinkGDBServerCL. This issue will be addressed in March 2024 release of S32DS Platform.

Although K324 can do multicore, Segger's JLink doesn't offer this functionality out of the box.

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

yeshvanth-m — Wed, 27 Mar 2024 09:52:53 GMT

I debugged this with Jeremy. There's an issue with the board - the JTAG/SWD reset pin is asserted high by the MCU only. I need to replace this board with a new one maybe..

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

yeshvanth-m — Sat, 25 May 2024 12:17:32 GMT

So the issue was with the board. This issue no longer occurs, but now there's another issue:

Any idea why this error is popping up? I have built both projects for the M7 cores.

Re: Unable to debug S32K324 using S32 Design Studio and JLink Base

yeshvanth-m — Sat, 25 May 2024 12:35:19 GMT

I restored defaults in the debug window and it seems to be working now.