topic S32K344 SPI+DMA send data error in S32K

S32K344 SPI+DMA send data error

_tian_10 — Mon, 20 May 2024 08:57:47 GMT

Hi all!

Recently also read our forum posts, RTD configuration also refer to part of the post configuration, but the use of DMA asynchronous sending mode, the sent data is not correct, the first data is often all 0, and the data sent after is often the content of the previous data. However, the function of cache is not opened, I do not know why this situation exists. The attachment provides a project for configuring SPI and DMA, please help to check whether there is any problem with the configuration.

Best Regards

tian

Re: S32K344 SPI+DMA send data error

danielmartynek — Mon, 20 May 2024 12:46:55 GMT

Hi Tian,

I just checked the linker file and system.c, and the cache is enabled on the SRAM where you have the buffers.

Have you tried placing it into .mcal_bss_no_cacheable?

https://community.nxp.com/t5/S32K/S32K344-UART-DMA-example/td-p/1583510

Regards,

Daniel

Re: S32K344 SPI+DMA send data error

_tian_10 — Tue, 21 May 2024 02:41:04 GMT

Thank you very much! It can work normally.To be honest, there is no research on memory allocation. Thank you again for your prompt reply!

Re: S32K344 SPI+DMA send data error

_tian_10 — Tue, 21 May 2024 02:43:17 GMT

Thank you very much! It can work normally!