<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: S32K 3line SPI in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1851878#M34510</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/226116"&gt;@ChenPeng3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The functions implemented at the SDK for LPSPI do not have "native support" for 3-wire. So it required to make some changes to support half duplex mode. Also, check the following thread. It has information related to the topic that might be useful.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K/S32K-3-Wire-SPI-Drivers/td-p/1342666" target="_blank" rel="noopener"&gt;S32K 3-Wire SPI Drivers&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Additionally, included with the &lt;A href="https://www.nxp.com/webapp/swlicensing/sso/downloadSoftware.sp?catid=SW32K1-RTD44-D" target="_blank" rel="noopener"&gt;Real-Time Drivers for S32K1&lt;/A&gt;&amp;nbsp;examples of SPI half duplex transfer are provided.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;B.R.&lt;/P&gt;
&lt;P&gt;VaneB&lt;/P&gt;</description>
    <pubDate>Mon, 22 Apr 2024 21:14:33 GMT</pubDate>
    <dc:creator>VaneB</dc:creator>
    <dc:date>2024-04-22T21:14:33Z</dc:date>
    <item>
      <title>S32K 3line SPI</title>
      <link>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1851646#M34501</link>
      <description>&lt;P&gt;hi:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;I use the S32K144，RTM4.01 IDES32DS3.5，but the SDK library without a three-wire SPI Demo, can you provide a three-wire SPi demo?&lt;/P&gt;</description>
      <pubDate>Mon, 22 Apr 2024 12:45:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1851646#M34501</guid>
      <dc:creator>ChenPeng3</dc:creator>
      <dc:date>2024-04-22T12:45:28Z</dc:date>
    </item>
    <item>
      <title>Re: S32K 3line SPI</title>
      <link>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1851878#M34510</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/226116"&gt;@ChenPeng3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The functions implemented at the SDK for LPSPI do not have "native support" for 3-wire. So it required to make some changes to support half duplex mode. Also, check the following thread. It has information related to the topic that might be useful.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K/S32K-3-Wire-SPI-Drivers/td-p/1342666" target="_blank" rel="noopener"&gt;S32K 3-Wire SPI Drivers&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Additionally, included with the &lt;A href="https://www.nxp.com/webapp/swlicensing/sso/downloadSoftware.sp?catid=SW32K1-RTD44-D" target="_blank" rel="noopener"&gt;Real-Time Drivers for S32K1&lt;/A&gt;&amp;nbsp;examples of SPI half duplex transfer are provided.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;B.R.&lt;/P&gt;
&lt;P&gt;VaneB&lt;/P&gt;</description>
      <pubDate>Mon, 22 Apr 2024 21:14:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1851878#M34510</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-04-22T21:14:33Z</dc:date>
    </item>
    <item>
      <title>Re: S32K 3line SPI</title>
      <link>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1852085#M34522</link>
      <description>&lt;P&gt;hi&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Thanks for the reply, RTM 4.01 needs to modify the underlying driver library to implement this feature.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ChenPeng3_0-1713849363550.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/275130iD88C2408201FA7CA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ChenPeng3_0-1713849363550.png" alt="ChenPeng3_0-1713849363550.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Apr 2024 05:16:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1852085#M34522</guid>
      <dc:creator>ChenPeng3</dc:creator>
      <dc:date>2024-04-23T05:16:16Z</dc:date>
    </item>
    <item>
      <title>Re: S32K 3line SPI</title>
      <link>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1856093#M34725</link>
      <description />
      <pubDate>Sun, 28 Apr 2024 02:05:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-3line-SPI/m-p/1856093#M34725</guid>
      <dc:creator>ChenPeng3</dc:creator>
      <dc:date>2024-04-28T02:05:59Z</dc:date>
    </item>
  </channel>
</rss>

