<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: How to configure clock for TCM on S32K3x?</title>
    <link>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1846345#M34147</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/228651"&gt;@Chris-Sun&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The PRTN2_COFB1_CLKEN[REQ62] field for Cortex-M7_0 is enabled at reset as you can see from the image below:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="VaneB_0-1712956908322.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/273504i0BDD7B5B3F2F1104/image-size/medium?v=v2&amp;amp;px=400" role="button" title="VaneB_0-1712956908322.png" alt="VaneB_0-1712956908322.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;B.R.&lt;/P&gt;
&lt;P&gt;VaneB&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 12 Apr 2024 21:22:19 GMT</pubDate>
    <dc:creator>VaneB</dc:creator>
    <dc:date>2024-04-12T21:22:19Z</dc:date>
    <item>
      <title>How to configure clock for TCM on S32K3x?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1845932#M34118</link>
      <description>&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;I&amp;nbsp;&lt;/SPAN&gt;am currently using the&lt;SPAN&gt;&amp;nbsp;TCM&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;feature of S32K3x in my RTD.&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;I encountered an issue while configuring the TCM clock:&lt;/DIV&gt;&lt;DIV&gt;According to the source code of RTD, it is necessary to configure a macro definition, CLOCK_IP_HAS_TCM_CM7_0_CLK,&amp;nbsp; before configuring the TCM clock.&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="8.png" style="width: 548px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/273402iEF74256F219EE819/image-size/large?v=v2&amp;amp;px=999" role="button" title="8.png" alt="8.png" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;However, there is currently no corresponding place for CLOCK_IP_HAS_TCM_CM7_0_CLK.&lt;/DIV&gt;&lt;DIV&gt;I also couldn't find any configuration options for the TCM clock in S32DS software.&lt;/DIV&gt;&lt;DIV&gt;Should I manually modify Clock_Ip_Cfg_Defines.h to add this configuration?&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;(I'm using S32K312 Project)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;The version information:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;S32DS: 3.5&lt;/P&gt;&lt;P&gt;RTD:&amp;nbsp;&lt;SPAN&gt;S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;BR /&gt;Chris&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Fri, 12 Apr 2024 08:10:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1845932#M34118</guid>
      <dc:creator>Chris-Sun</dc:creator>
      <dc:date>2024-04-12T08:10:16Z</dc:date>
    </item>
    <item>
      <title>Re: How to configure clock for TCM on S32K3x?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1846345#M34147</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/228651"&gt;@Chris-Sun&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The PRTN2_COFB1_CLKEN[REQ62] field for Cortex-M7_0 is enabled at reset as you can see from the image below:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="VaneB_0-1712956908322.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/273504i0BDD7B5B3F2F1104/image-size/medium?v=v2&amp;amp;px=400" role="button" title="VaneB_0-1712956908322.png" alt="VaneB_0-1712956908322.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;B.R.&lt;/P&gt;
&lt;P&gt;VaneB&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 12 Apr 2024 21:22:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1846345#M34147</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-04-12T21:22:19Z</dc:date>
    </item>
    <item>
      <title>Re: How to configure clock for TCM on S32K3x?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1846611#M34168</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your response to my post.&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;Your response resolved my confusion.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;BR /&gt;Chris&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 15 Apr 2024 02:04:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1846611#M34168</guid>
      <dc:creator>Chris-Sun</dc:creator>
      <dc:date>2024-04-15T02:04:33Z</dc:date>
    </item>
    <item>
      <title>Re: How to configure clock for TCM on S32K3x?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1971549#M41904</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hi Mr.Sun:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;------&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;From your appeal description, I cannot infer a solution to the problem. At present, K312 does not seem to support the enable configuration of TCM-CM7_0_CLK. Can you provide a more detailed solution.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The problem I am currently facing is that after the interrupt is enabled and triggered, I cannot enter the interrupt. I don't know if it is related to TCM-CM7_0_CLK not being enabled?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 17:25:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-configure-clock-for-TCM-on-S32K3x/m-p/1971549#M41904</guid>
      <dc:creator>XuanZhangming</dc:creator>
      <dc:date>2024-10-10T17:25:32Z</dc:date>
    </item>
  </channel>
</rss>

