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    <title>S32KのトピックRe: LpUart Send Data Problem</title>
    <link>https://community.nxp.com/t5/S32K/LpUart-Send-Data-Problem/m-p/836998#M3307</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The issue looks like data register overflow.&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Receiver Overrun Flag (OR)&lt;/EM&gt; is set when software fails to prevent the receive data register from overflowing with data.&lt;/P&gt;&lt;P&gt;While the OR flag is set, no additional data is stored in the data buffer even if sufficient room exists.&lt;/P&gt;&lt;P&gt;To clear OR, write logic 1 to the OR flag.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please check the flags in the LPUART Status Register? Is OR flag set?&lt;/P&gt;&lt;P&gt;For detailed information see chapter 51.3.1.7 LPUART Status Register (STAT) in the Reference Manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How to prevent overrun:&lt;/P&gt;&lt;P&gt;- Decrease the BaudRate value&lt;/P&gt;&lt;P&gt;- Set the higher priority of LPUART interrupt&lt;/P&gt;&lt;P&gt;- Choose the fastest clock source for the LPUART&lt;/P&gt;&lt;P&gt;- You can consider the use of FIFO register see 51.3.1.12 LPUART FIFO Register (FIFO) in the Reference Manual.&lt;/P&gt;&lt;P&gt;There can be set the maximum number of receive data words that can be stored in the receive buffer before an overrun occurs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps you.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 10 Oct 2018 14:20:43 GMT</pubDate>
    <dc:creator>dianabatrlova</dc:creator>
    <dc:date>2018-10-10T14:20:43Z</dc:date>
    <item>
      <title>LpUart Send Data Problem</title>
      <link>https://community.nxp.com/t5/S32K/LpUart-Send-Data-Problem/m-p/836997#M3306</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;MCU:S32K144&lt;/P&gt;&lt;P&gt;Uart baudRate;9600&lt;/P&gt;&lt;P&gt;when MCU&amp;nbsp; recieved buffer[9]={11,22,33,44,55,66,77,88,99},it would send buffer it recieved.&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/74163i802529A1278E9F42/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;But when uart baudRate was 115200,it could't send buffer[9]={11,22,33,44,55,66,77,88,99},it sent {11,22}。&lt;/P&gt;&lt;P&gt;So I could not unstand.&lt;/P&gt;&lt;P&gt;My board was used external oscillator 16MHZ.Uart's CLOCK was 8MHZ.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_5.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/74248i7908DEBE6BD14DAF/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_5.png" alt="pastedImage_5.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/74210iB6AC943FEB888993/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Oct 2018 05:31:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LpUart-Send-Data-Problem/m-p/836997#M3306</guid>
      <dc:creator>玉敏111田</dc:creator>
      <dc:date>2018-10-09T05:31:53Z</dc:date>
    </item>
    <item>
      <title>Re: LpUart Send Data Problem</title>
      <link>https://community.nxp.com/t5/S32K/LpUart-Send-Data-Problem/m-p/836998#M3307</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The issue looks like data register overflow.&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Receiver Overrun Flag (OR)&lt;/EM&gt; is set when software fails to prevent the receive data register from overflowing with data.&lt;/P&gt;&lt;P&gt;While the OR flag is set, no additional data is stored in the data buffer even if sufficient room exists.&lt;/P&gt;&lt;P&gt;To clear OR, write logic 1 to the OR flag.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please check the flags in the LPUART Status Register? Is OR flag set?&lt;/P&gt;&lt;P&gt;For detailed information see chapter 51.3.1.7 LPUART Status Register (STAT) in the Reference Manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How to prevent overrun:&lt;/P&gt;&lt;P&gt;- Decrease the BaudRate value&lt;/P&gt;&lt;P&gt;- Set the higher priority of LPUART interrupt&lt;/P&gt;&lt;P&gt;- Choose the fastest clock source for the LPUART&lt;/P&gt;&lt;P&gt;- You can consider the use of FIFO register see 51.3.1.12 LPUART FIFO Register (FIFO) in the Reference Manual.&lt;/P&gt;&lt;P&gt;There can be set the maximum number of receive data words that can be stored in the receive buffer before an overrun occurs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps you.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Oct 2018 14:20:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LpUart-Send-Data-Problem/m-p/836998#M3307</guid>
      <dc:creator>dianabatrlova</dc:creator>
      <dc:date>2018-10-10T14:20:43Z</dc:date>
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