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    <title>topic Re: TRNG in S32K</title>
    <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1828739#M33009</link>
    <description>&lt;P&gt;Data cache can be disabled by DC bit in CCR ARM core register:&lt;BR /&gt;&lt;A href="https://developer.arm.com/documentation/dui0646/b/Bhcjabhi" target="_blank"&gt;https://developer.arm.com/documentation/dui0646/b/Bhcjabhi&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;You can take a look at Crypto examples like:&lt;BR /&gt;c:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\RTD\Crypto_43_HSE_TS_T40D34M40I0R0\examples\S32DS\S32K3XX\Hse_Ip_AesEncAsyncIrq_S32K344\src\main.c&lt;/P&gt;
&lt;P&gt;You can find something like this in the LOCAL VARIABLES section (there are more similar definitions for different type of objects):&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1710438456457.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268479iCFCDA33B91DD635C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1710438456457.png" alt="lukaszadrapa_0-1710438456457.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
    <pubDate>Thu, 14 Mar 2024 17:48:09 GMT</pubDate>
    <dc:creator>lukaszadrapa</dc:creator>
    <dc:date>2024-03-14T17:48:09Z</dc:date>
    <item>
      <title>TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1819443#M32361</link>
      <description>&lt;P&gt;HI ,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;I am looking for more information regarding the class of the TRNG but i am not able to find any document. I need detailed information regarding the class like DRG3 , DRG4 for TRNG so that i can know which one i have to use for the CMAC key generation.&lt;/P&gt;&lt;P&gt;Kindly provide me the document.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 01 Mar 2024 10:03:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1819443#M32361</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-01T10:03:46Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1821496#M32486</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/224860"&gt;@vikmonti7804&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;search for rngClass keyword in both HSE-B Firmware Reference Manual and also in S32K312_HSE_Service_API_Reference_Manual which can be found in HSE FW package.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1709636543299.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/266562iDA963E743FA58D31/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1709636543299.png" alt="lukaszadrapa_0-1709636543299.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_1-1709636548579.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/266563i38FCA40D5E65F97B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_1-1709636548579.png" alt="lukaszadrapa_1-1709636548579.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Tue, 05 Mar 2024 11:02:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1821496#M32486</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-05T11:02:47Z</dc:date>
    </item>
    <item>
      <title>Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1821551#M32491</link>
      <description>&lt;P&gt;HI Lucas,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;I am compiling one of the project from RTD package about the crypto but i am facing a issue that while it is going into the debug it goes into the erasing the chip wait for some time and then it suspended due to time out. this is happening with other projects too.&lt;/P&gt;&lt;P&gt;this board was flashed with the HSE FW with linker file.&lt;/P&gt;&lt;P&gt;kindly find the logs of console below&lt;/P&gt;&lt;P&gt;Initializing.&lt;BR /&gt;Soft reset failed!&lt;BR /&gt;Target has been RESET and is active.&lt;BR /&gt;CMD&amp;gt;CM C:\NXP\S32DS.3.5\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_5.1.7.202112141853\win32\gdi\P&amp;amp;E\supportFiles_ARM\NXP\S32K3xx\nxp_s32k312_1x32x500k_hse_disabled.arp&lt;BR /&gt;&lt;BR /&gt;Initializing.&lt;BR /&gt;Soft reset failed!&lt;BR /&gt;Initialized.&lt;BR /&gt;&lt;BR /&gt;;version 1.00, 08/27/2021, Copyright 2021 P&amp;amp;E Microcomputer Systems, &lt;A href="http://www.pemicro.com" target="_blank"&gt;www.pemicro.com&lt;/A&gt; [S32K3x2_hse_disabled]&lt;BR /&gt;&lt;BR /&gt;;device nxp, s32k312, 1x32x500k,desc=hse_disabled&lt;BR /&gt;&lt;BR /&gt;;begin_cs device=$00400000, length=$001F4000, ram=$20400000&lt;BR /&gt;&lt;BR /&gt;Loading programming algorithm ...&lt;BR /&gt;&lt;BR /&gt;WARNING - Selected .ARP file has been modified. CRC16 = $ACE3&lt;BR /&gt;Done.&lt;BR /&gt;Programming sequency is : erase, blank check, program, and verify {default}&lt;BR /&gt;CMD&amp;gt;VC&lt;BR /&gt;Command is inactive for this .ARP file.&lt;BR /&gt;VC is not implemented, falling back to VM&lt;BR /&gt;&lt;BR /&gt;CMD&amp;gt;VM&lt;BR /&gt;&lt;BR /&gt;Verifying.&lt;BR /&gt;Verify error at address $00400000.&lt;BR /&gt;Byte in module is $FF and should be $A5.&lt;BR /&gt;Current content of flash does not match application to be programmed&lt;BR /&gt;CMD&amp;gt;EM&lt;BR /&gt;&lt;BR /&gt;Erasing.&lt;/P&gt;&lt;P&gt;Could not connect to semihosting port due to connection timeout. Please check that the correct port number is configured.&lt;/P&gt;</description>
      <pubDate>Tue, 05 Mar 2024 12:14:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1821551#M32491</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-05T12:14:58Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1821581#M32494</link>
      <description>&lt;P&gt;Once the HSE FW is installed, you need to change flash algorithm because some flash is then reserved for HSE. See please attached screenshot.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Tue, 05 Mar 2024 13:00:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1821581#M32494</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-05T13:00:32Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1822456#M32567</link>
      <description>&lt;P&gt;Hi Lucas , thank you for your support.&lt;/P&gt;&lt;P&gt;i have used the crypto example code for s32k312 from rtd 4.4 2.0.3 and added all the folder services, interface, drivers and framework and trying to use this project for development purpose, but i am stuck in some hardfault and i am not able to resolve.&lt;/P&gt;&lt;P&gt;kindly help and find the attached project.&lt;/P&gt;&lt;P&gt;loges are beow.&lt;/P&gt;&lt;P&gt;Connection from "127.0.0.1" via 127.0.0.1. Connection from port "53301" to 6224&lt;BR /&gt;Connection from "127.0.0.1" via 127.0.0.1. Connection from port "53308" to 7224&lt;BR /&gt;Telnet server running on 127.0.0.1:51794&lt;BR /&gt;Searching for Kernel Symbols...&lt;BR /&gt;rsp_qC - qSymbol: 5F74785F7468726561645F63757272656E745F707472&lt;BR /&gt;_tx_thread_current_ptr not found. ThreadX analysis not enabled.&lt;BR /&gt;rsp_qC - qSymbol: 707843757272656E74544342&lt;BR /&gt;pxCurrentTCB not found. FreeRTOS analysis not enabled.&lt;BR /&gt;Unable to load libusb0.dll&lt;BR /&gt;Copyright 2021 P&amp;amp;E Microcomputer Systems,Inc.&lt;BR /&gt;Command Line :C:\NXP\S32DS.3.5\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_5.1.7.202112141853\win32\pegdbserver_console -device=NXP_S32K3xx_S32K312 -startserver -singlesession -serverport=7224 -gdbmiport=6224 -interface=USBMULTILINK -speed=5000 -port=U¨&lt;BR /&gt;PEmicro Interface detected - Flash Version 11.13&lt;BR /&gt;&lt;BR /&gt;CMD&amp;gt;RE&lt;BR /&gt;&lt;BR /&gt;Initializing.&lt;BR /&gt;Soft reset failed!&lt;BR /&gt;Target has been RESET and is active.&lt;BR /&gt;CMD&amp;gt;CM C:\NXP\S32DS.3.5\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_5.1.7.202112141853\win32\gdi\P&amp;amp;E\supportFiles_ARM\NXP\S32K3xx\nxp_s32k312_1x32x424k_ab_swap.arp&lt;BR /&gt;&lt;BR /&gt;Initializing.&lt;BR /&gt;Soft reset failed!&lt;BR /&gt;Initialized.&lt;BR /&gt;&lt;BR /&gt;;version 1.00, 08/27/2021, Copyright 2021 P&amp;amp;E Microcomputer Systems, &lt;A href="http://www.pemicro.com" target="_blank"&gt;www.pemicro.com&lt;/A&gt; [S32K3x2_ab_swap]&lt;BR /&gt;&lt;BR /&gt;;device nxp, s32k312, 1x32x424k,desc=ab_swap&lt;BR /&gt;&lt;BR /&gt;;begin_cs device=$00400000, length=$001D4000, ram=$20400000&lt;BR /&gt;&lt;BR /&gt;Loading programming algorithm ...&lt;BR /&gt;&lt;BR /&gt;WARNING - Selected .ARP file has been modified. CRC16 = $E7CD&lt;BR /&gt;Done.&lt;BR /&gt;Programming sequency is : erase, blank check, program, and verify {default}&lt;BR /&gt;CMD&amp;gt;VC&lt;BR /&gt;Command is inactive for this .ARP file.&lt;BR /&gt;VC is not implemented, falling back to VM&lt;BR /&gt;&lt;BR /&gt;CMD&amp;gt;VM&lt;BR /&gt;&lt;BR /&gt;Verifying.&lt;BR /&gt;Verified.&lt;BR /&gt;&lt;BR /&gt;Application verified in memory. No need to reprogram.&lt;BR /&gt;&lt;BR /&gt;CMD&amp;gt;RE&lt;BR /&gt;&lt;BR /&gt;Initializing.&lt;BR /&gt;Soft reset failed!&lt;BR /&gt;Target has been RESET and is active.&lt;BR /&gt;Soft reset failed!&lt;BR /&gt;&lt;BR /&gt;Starting reset script (C:\NXP\S32DS.3.5\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_5.1.7.202112141853\win32\gdi\P&amp;amp;E\supportFiles_ARM\NXP\S32K3xx\S32K312.mac) ...&lt;BR /&gt;REM Enable clocks for selected cores in MC_ME module (the sequence below enables all clocks).&lt;BR /&gt;REM Initialize RAM and DMA:&lt;BR /&gt;REM Initialize DMA TCD:&lt;BR /&gt;REM Copy valid executable code to RAM for each core to be used.&lt;BR /&gt;REM Enable required cores in MC_ME:&lt;BR /&gt;Delaying for 20mS ...&lt;BR /&gt;Done.&lt;BR /&gt;&lt;BR /&gt;Reset script (C:\NXP\S32DS.3.5\eclipse\plugins\com.pemicro.debug.gdbjtag.pne_5.1.7.202112141853\win32\gdi\P&amp;amp;E\supportFiles_ARM\NXP\S32K3xx\S32K312.mac) completed.&lt;BR /&gt;&lt;BR /&gt;BusFault: An imprecise (asynchronous) data access error has occurred.&lt;BR /&gt;HardFault: A fault has been escalated to a hard fault.&lt;/P&gt;</description>
      <pubDate>Wed, 06 Mar 2024 12:00:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1822456#M32567</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-06T12:00:18Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1822956#M32605</link>
      <description>&lt;P&gt;Hi Lucas,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Before adding these folders services, framework, interface and drivers to the project, the mcal configuration was having no errors but after adding these folders to the projects the mcal configuration is having the errors. please find the attached image. kindly help for hard fault. you can this project i have already attached in previous message.&lt;/P&gt;&lt;P&gt;&amp;nbsp;If possible provide some time or invite to discuss, can be half an hour call, i need to clarify many things.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="vikmonti7804_0-1709788822306.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/266910i4B107DFD1FDAA524/image-size/medium?v=v2&amp;amp;px=400" role="button" title="vikmonti7804_0-1709788822306.png" alt="vikmonti7804_0-1709788822306.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 07 Mar 2024 05:21:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1822956#M32605</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-07T05:21:19Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1823413#M32633</link>
      <description>&lt;P&gt;A couple of things:&lt;/P&gt;
&lt;P&gt;- the error "Processor..." was caused by missing .settings folder. I added the folder from another project and the problem disappeared.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_1-1709819814199.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267048iE6F0E0C096B8C759/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_1-1709819814199.png" alt="lukaszadrapa_1-1709819814199.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;- then there were some issues with paths. Not sure why but I fixed it using "workspace" paths like this:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1709819805017.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267047iBEBEF18BE3BBA925/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1709819805017.png" alt="lukaszadrapa_0-1709819805017.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;- and the hard fault was caused by linker file:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_2-1709819859074.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267049i851E65AC07603415/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_2-1709819859074.png" alt="lukaszadrapa_2-1709819859074.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;There's only 96KB RAM, so it ends at 0x20417FFF.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 07 Mar 2024 14:02:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1823413#M32633</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-07T14:02:50Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1823529#M32637</link>
      <description>Hi Lucas, &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Thanks for the support. But i changed the SRAM configuration in the linker file but the still i see it goes into the hard fault. Did you tried at your end by changing the SRAM values? I changed the configuration with below setting.&amp;nbsp; MEMORY { int_flash : ORIGIN = 0x00400000, LENGTH = 0x003FFFF /* 2048K - 176K (sBAF + HSE) vikas */ int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00001000 /* 32K */ int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x0001FFFF /* 64K */ int_sram : ORIGIN = 0x20400000, LENGTH = 0x00010000 /* 27 KB */ int_sram_fls_rsv : ORIGIN = 0x20410000, LENGTH = 0x00000100 int_sram_stack_c0 : ORIGIN = 0x20410100, LENGTH = 0x00002000 int_sram_no_cacheable : ORIGIN = 0x20412100, LENGTH = 0x00007F00 /* 32kb , needs to include int_results */ int_sram_results : ORIGIN = 0x2041A000, LENGTH = 0x00000100 int_sram_shareable : ORIGIN = 0x2041A100, LENGTH = 0x00008000 /* 32KB */ ram_rsvd2 : ORIGIN = 0x20422100, LENGTH = 0 /* End of SRAM */ /* End of SRAM */ } kindly check and help to resolve.</description>
      <pubDate>Thu, 07 Mar 2024 16:44:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1823529#M32637</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-07T16:44:23Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1823532#M32638</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="vikmonti7804_0-1709830019146.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267083i9303DF3632D72FB1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="vikmonti7804_0-1709830019146.png" alt="vikmonti7804_0-1709830019146.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 07 Mar 2024 16:47:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1823532#M32638</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-07T16:47:08Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1825889#M32826</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/224860"&gt;@vikmonti7804&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I wrote:&lt;BR /&gt;"There's only 96KB RAM, so it ends at 0x20417FFF."&lt;/P&gt;
&lt;P&gt;And I can see in your last post:&lt;BR /&gt;ram_rsvd2 : ORIGIN = 0x20422100, LENGTH = 0 /* End of SRAM */&lt;/P&gt;
&lt;P&gt;So, you are still out of physical RAM.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Tue, 12 Mar 2024 07:59:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1825889#M32826</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-12T07:59:37Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1826790#M32878</link>
      <description>&lt;P&gt;Hi Lucas,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Thanks for the answer.&lt;/P&gt;&lt;P&gt;I need some clarification on below points.&lt;/P&gt;&lt;P&gt;I have created a project from the crypto example code rtd 4.4 2.0.0 version and then i added the folders services, driver, framework from the HSE demo example code.&lt;/P&gt;&lt;P&gt;I added the interface folder from the&amp;nbsp;HSE_FW_S32K312_0_2_40_0 provided by nxp for the HSE FW.&lt;/P&gt;&lt;P&gt;1. I am i doing correct? because i have added these folder to the project which has RTD mcal layer generated from the configuration tool.&lt;/P&gt;&lt;P&gt;2. i noticed that there are duplicate files in the interface and RTD folder but the content is different so which folder file should i use?&lt;/P&gt;&lt;P&gt;i deleted the RTD duplicate file because interface same name file has more content and it resolve errors.&lt;/P&gt;&lt;P&gt;3. I future we can add other peripherals for mcal and generate the code , will this impact the project and recreate the RTD file original one if i have deleted them with interface files?&lt;/P&gt;&lt;P&gt;please find the attached interface folder provided by nxp snapshot and project snapshot.&lt;/P&gt;&lt;P&gt;Kindly answer and my lear team needs one meeting with you for HSE related doubts, can it be possiblt for you to invite for 1 hour meeting with them. Please let me know.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="vikmonti7804_0-1710303886224.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268023i509164AFD91C813A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="vikmonti7804_0-1710303886224.png" alt="vikmonti7804_0-1710303886224.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="vikmonti7804_1-1710303906202.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268024i84322A427F8DD2FB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="vikmonti7804_1-1710303906202.png" alt="vikmonti7804_1-1710303906202.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 13 Mar 2024 04:27:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1826790#M32878</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-13T04:27:50Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1826937#M32895</link>
      <description>&lt;P&gt;Hi Lucas,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; I am trying to generate the Random number generation but its not working and giving back the response that the feature is not supported (HSE_SRV_RSP_NOT_SUPPORTED).&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="vikmonti7804_0-1710317896925.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268057i826B9121119C6BAD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="vikmonti7804_0-1710317896925.png" alt="vikmonti7804_0-1710317896925.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 13 Mar 2024 08:18:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1826937#M32895</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-13T08:18:26Z</dc:date>
    </item>
    <item>
      <title>Re: Re:Error</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1828249#M32977</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/224860"&gt;@vikmonti7804&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please follow Integration Manual for Crypto driver, section "3.2 Files required for compilation":&lt;BR /&gt;c:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\RTD\Crypto_43_HSE_TS_T40D34M40I0R0\doc\RTD_CRYPTO_43_HSE_IM.pdf&lt;/P&gt;
&lt;P&gt;If you want to have a call with HSE experts, please request it at your local NXP sales or FAE person assigned to Lear. Our online support team has not resources for that and this is rather a responsibility of local FAE.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 08:47:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1828249#M32977</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-14T08:47:05Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1828250#M32978</link>
      <description>&lt;P&gt;This is caused by data cache, most likely. To confirm it, you can simply turn off the data cache and it should work. To solve it, all the data structures used for communication with HSE via MU need to be forced to non-cacheable memory.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 08:48:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1828250#M32978</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-14T08:48:30Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1828345#M32984</link>
      <description>&lt;P&gt;HI Lucas,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Can you please explain how to turn off this data cache?&lt;/P&gt;&lt;P&gt;And how to do &lt;SPAN&gt;all the data structures used for communication with HSE via MU need to be forced to non-cacheable memory ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;please explain with some images.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 10:01:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1828345#M32984</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-14T10:01:03Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1828739#M33009</link>
      <description>&lt;P&gt;Data cache can be disabled by DC bit in CCR ARM core register:&lt;BR /&gt;&lt;A href="https://developer.arm.com/documentation/dui0646/b/Bhcjabhi" target="_blank"&gt;https://developer.arm.com/documentation/dui0646/b/Bhcjabhi&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;You can take a look at Crypto examples like:&lt;BR /&gt;c:\NXP\S32DS.3.5\S32DS\software\PlatformSDK_S32K3\RTD\Crypto_43_HSE_TS_T40D34M40I0R0\examples\S32DS\S32K3XX\Hse_Ip_AesEncAsyncIrq_S32K344\src\main.c&lt;/P&gt;
&lt;P&gt;You can find something like this in the LOCAL VARIABLES section (there are more similar definitions for different type of objects):&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1710438456457.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268479iCFCDA33B91DD635C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1710438456457.png" alt="lukaszadrapa_0-1710438456457.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 17:48:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1828739#M33009</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-14T17:48:09Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1829694#M33073</link>
      <description>&lt;P&gt;Hi Lucas,&lt;/P&gt;&lt;P&gt;Thanks for explaining but why these points are not mentioned in any document which is making this very hard to do. kindly check this program still this is not working, kindly look into this and and modify it to work.&lt;/P&gt;&lt;P&gt;Thank You&lt;/P&gt;</description>
      <pubDate>Sat, 16 Mar 2024 06:47:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1829694#M33073</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-16T06:47:49Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1830212#M33113</link>
      <description>&lt;P&gt;Hi Lucas,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Kindly help, this RNG is pending from many days and project is lagging behind, kindly help, once its done other things i will take care.&lt;/P&gt;</description>
      <pubDate>Mon, 18 Mar 2024 10:12:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1830212#M33113</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-18T10:12:07Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1830251#M33116</link>
      <description>&lt;P&gt;Hi Lucas,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; There are two apis available to communicate to HSE via host.&lt;/P&gt;&lt;P&gt;hseStatus = Crypto_Hse_SendMsg&amp;nbsp; from RTD&lt;BR /&gt;hseStatus = HSE_Send&amp;nbsp; &amp;nbsp;from the hse_host.c HSE demo example code&lt;/P&gt;&lt;P&gt;Both has different parameters and the RTD one has too many parameter, can you please suggest which one we should use ?&lt;/P&gt;&lt;P&gt;Also we are developing our code with the help of config tool for compliance with Autosar.&lt;/P&gt;&lt;P&gt;Please reply and also try to resolve the TRNG issue.&lt;/P&gt;</description>
      <pubDate>Mon, 18 Mar 2024 11:00:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1830251#M33116</guid>
      <dc:creator>vikmonti7804</dc:creator>
      <dc:date>2024-03-18T11:00:36Z</dc:date>
    </item>
    <item>
      <title>Re: TRNG</title>
      <link>https://community.nxp.com/t5/S32K/TRNG/m-p/1830312#M33127</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/224860"&gt;@vikmonti7804&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I tried to turn off the data cache as a first step:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1710765650961.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268966iF031DB2D886911E3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1710765650961.png" alt="lukaszadrapa_0-1710765650961.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;And I can see that the random number is generated:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_1-1710765661204.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268967i7C35C8E6B2612C8A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_1-1710765661204.png" alt="lukaszadrapa_1-1710765661204.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;So, this confirms it's caused by the cache. I can see that you only copied the definitions from the example. But this does not solve the problem. If you take a look at the function:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_2-1710765679907.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268968i80D1513A86DC6EF0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_2-1710765679907.png" alt="lukaszadrapa_2-1710765679907.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;... there are local variables used for communication with the HSE via MU and the stack is obviously cacheable because it does not work.&lt;/P&gt;
&lt;P&gt;HSE DEMO EXAMPLES is non-autosar code. If you need to be autosar compliant, it will be necessary to use Crypto layer in RTD. You can take a look Crypto examples in RTD - examples with "Crypto_" prefix. &lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Mon, 18 Mar 2024 12:43:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TRNG/m-p/1830312#M33127</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2024-03-18T12:43:22Z</dc:date>
    </item>
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