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    <title>topic Re: DMA CRC Calculation over flasharea in S32K</title>
    <link>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1806162#M31649</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203228"&gt;@FelixR&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The CRC module provides a programmable polynomial and other parameters necessary to implement the 16-bit or 32-bit CRC standards. What algorithm are you using? This is to test from our side.&lt;/P&gt;
&lt;P&gt;Furthermore, we have observed that in some external ways to calculate the CRC other than the S32K3 module, the result is influenced by how the data is provided.&lt;/P&gt;
&lt;P&gt;If you try with a single value, do you see that there are still differences in the results?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;B.R.&lt;/P&gt;
&lt;P&gt;VaneB&lt;/P&gt;</description>
    <pubDate>Tue, 13 Feb 2024 21:52:09 GMT</pubDate>
    <dc:creator>VaneB</dc:creator>
    <dc:date>2024-02-13T21:52:09Z</dc:date>
    <item>
      <title>DMA CRC Calculation over flasharea</title>
      <link>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1805793#M31637</link>
      <description>&lt;P&gt;Hello there,&lt;/P&gt;&lt;P&gt;I resently played around with the DMA CRC Hardware acceleration. There I noticed that I get different results for the CRC-Data provided by the Crc_Ip_Example.&lt;/P&gt;&lt;P&gt;When I calculate the CRC over the RAM structure inside the Codeflash Area (here 0x004255E4) I get the expected result of 0x0E551D7CU inside my crc_result variable as shown below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="FelixR_1-1707826415557.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262926i45FB107DA2858F68/image-size/medium?v=v2&amp;amp;px=400" role="button" title="FelixR_1-1707826415557.png" alt="FelixR_1-1707826415557.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;However, if I write the CRC_data into the Dataflash Memory (using the example Codes from the C40_Ip_Example) at the location 0x10000000 and then pass this address to the CRC engine the resulting data I get a different result.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="FelixR_2-1707826538411.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/262927i761C5C3BAF464898/image-size/medium?v=v2&amp;amp;px=400" role="button" title="FelixR_2-1707826538411.png" alt="FelixR_2-1707826538411.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The memory dump inside the second picture confirmed that Data inside the Memory of the S32K344 is in the same order in Flash aswell as in the RAM section.&lt;/P&gt;&lt;P&gt;Is it not possible to read from flash using the DMA in such a way that I can build checksums over known locations with hardware acceleration or does the flash has some different properties when I want to read from it?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 13 Feb 2024 12:20:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1805793#M31637</guid>
      <dc:creator>FelixR</dc:creator>
      <dc:date>2024-02-13T12:20:45Z</dc:date>
    </item>
    <item>
      <title>Re: DMA CRC Calculation over flasharea</title>
      <link>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1806162#M31649</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203228"&gt;@FelixR&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The CRC module provides a programmable polynomial and other parameters necessary to implement the 16-bit or 32-bit CRC standards. What algorithm are you using? This is to test from our side.&lt;/P&gt;
&lt;P&gt;Furthermore, we have observed that in some external ways to calculate the CRC other than the S32K3 module, the result is influenced by how the data is provided.&lt;/P&gt;
&lt;P&gt;If you try with a single value, do you see that there are still differences in the results?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;B.R.&lt;/P&gt;
&lt;P&gt;VaneB&lt;/P&gt;</description>
      <pubDate>Tue, 13 Feb 2024 21:52:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1806162#M31649</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-02-13T21:52:09Z</dc:date>
    </item>
    <item>
      <title>Re: DMA CRC Calculation over flasharea</title>
      <link>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1806426#M31659</link>
      <description>&lt;P&gt;The error occurred at the 128 Byte boundary, resulting in different results on the 129th Byte. The mistake was on my end during the Nvm write process where I accidentally wrote the same 128 Byte block on the flash, leading to a different CRC calculation. However, I have fixed the bug and written the correct data in the D-Flash, resulting in the same CRC value.&lt;/P&gt;&lt;P&gt;Still thank you for response Vane.&lt;/P&gt;</description>
      <pubDate>Wed, 14 Feb 2024 09:59:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/DMA-CRC-Calculation-over-flasharea/m-p/1806426#M31659</guid>
      <dc:creator>FelixR</dc:creator>
      <dc:date>2024-02-14T09:59:39Z</dc:date>
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