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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>S32K中的主题 Re: s32k312 + fs26 control problem</title>
    <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801651#M31434</link>
    <description>&lt;P&gt;hi akhil1&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I'm using RTD 3.0.0 in now.&amp;nbsp;&lt;SPAN&gt;However, it is expected that 2.0.3 will not be any different.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;here is my code&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/*==================================================================================================&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Project &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;: RTD AUTOSAR 4.7&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Platform &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; : CORTEXM&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Peripheral &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; : S32K3XX&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Dependencies &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; : none&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Autosar Version &amp;nbsp; &amp;nbsp; &amp;nbsp;: 4.7.0&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Autosar Revision &amp;nbsp; &amp;nbsp; : ASR_REL_4_7_REV_0000&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Autosar Conf.Variant :&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; SW Version &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; : 3.0.0&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Build Version &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;: S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; Copyright 2020 - 2023 NXP Semiconductors&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; NXP Confidential. This software is owned or controlled by NXP and may only be&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; used strictly in accordance with the applicable license terms. By expressly&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; accepting such terms or by downloading, installing, activating and/or otherwise&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; using the software, you are agreeing that you have read, and that you agree to&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; comply with and are bound by, such license terms. If you do not agree to be&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; bound by the applicable license terms, then you may not retain, install,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; activate or otherwise use the software.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;==================================================================================================*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;/**&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;@file&lt;/SPAN&gt;&lt;SPAN&gt; main.c&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;@addtogroup&lt;/SPAN&gt;&lt;SPAN&gt; main_module main module documentation&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;* &amp;nbsp; @{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Including necessary configuration files. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Mcal.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Port.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Platform.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Mcu.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"CDD_Uart.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Dio.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Dio_Ipw.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Gpt.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Icu.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"EcuM.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"CDD_Sbc_fs26.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;&amp;lt;stdlib.h&amp;gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;&amp;lt;stdio.h&amp;gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;&amp;lt;stdarg.h&amp;gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;&amp;lt;string.h&amp;gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt; &lt;SPAN&gt;UART_LPUART_INTERNAL_CHANNEL&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt; &lt;SPAN&gt;BUFFER_SIZE&lt;/SPAN&gt; &lt;SPAN&gt;512&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;static&lt;/SPAN&gt; &lt;SPAN&gt;char&lt;/SPAN&gt; &lt;SPAN&gt;s_buffer&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;BUFFER_SIZE&lt;/SPAN&gt;&lt;SPAN&gt;];&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint32 &lt;/SPAN&gt;&lt;SPAN&gt;T_timeout&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;FFFFFF&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;volatile&lt;/SPAN&gt; &lt;SPAN&gt;Uart_StatusType&lt;/SPAN&gt; &lt;SPAN&gt;Uart_TransmitStatus&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;UART_STATUS_TIMEOUT&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;volatile&lt;/SPAN&gt; &lt;SPAN&gt;int&lt;/SPAN&gt; &lt;SPAN&gt;exit_code&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* User includes */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;static&lt;/SPAN&gt;&lt;SPAN&gt; boolean &lt;/SPAN&gt;&lt;SPAN&gt;bWdRefresh&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;const&lt;/SPAN&gt; &lt;SPAN&gt;char&lt;/SPAN&gt; &lt;SPAN&gt;*&lt;/SPAN&gt;&lt;SPAN&gt;fmt&lt;/SPAN&gt;&lt;SPAN&gt;,&lt;/SPAN&gt;&lt;SPAN&gt; ...&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint32 &lt;/SPAN&gt;&lt;SPAN&gt;tempByte&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; __VALIST &lt;/SPAN&gt;&lt;SPAN&gt;ap&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;T_timeout&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;FCF&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;va_start&lt;/SPAN&gt;&lt;SPAN&gt;(ap, fmt);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; (&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;SPAN&gt;vsnprintf&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;s_buffer&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;BUFFER_SIZE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;fmt&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;ap&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;//(void)snprintf(s_buffer, BUFFER_SIZE, fmt, ap);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;va_end&lt;/SPAN&gt;&lt;SPAN&gt;(ap);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;s_buffer&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;BUFFER_SIZE&lt;/SPAN&gt; &lt;SPAN&gt;-&lt;/SPAN&gt; &lt;SPAN&gt;1&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;'&lt;/SPAN&gt;&lt;SPAN&gt;\0&lt;/SPAN&gt;&lt;SPAN&gt;'&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Uart_AsyncSend&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;UART_LPUART_INTERNAL_CHANNEL&lt;/SPAN&gt;&lt;SPAN&gt;, (&lt;/SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt; &lt;SPAN&gt;*&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;SPAN&gt;s_buffer&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;strlen&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;s_buffer&lt;/SPAN&gt;&lt;SPAN&gt;));&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;do&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Uart_TransmitStatus&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;Uart_GetStatus&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;UART_LPUART_INTERNAL_CHANNEL&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;tempByte&lt;/SPAN&gt;&lt;SPAN&gt;, UART_SEND);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; } &lt;/SPAN&gt;&lt;SPAN&gt;while&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;UART_STATUS_NO_ERROR&lt;/SPAN&gt; &lt;SPAN&gt;!=&lt;/SPAN&gt; &lt;SPAN&gt;Uart_TransmitStatus&lt;/SPAN&gt; &lt;SPAN&gt;&amp;amp;&amp;amp;&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt; &lt;SPAN&gt;&amp;lt;&lt;/SPAN&gt; &lt;SPAN&gt;T_timeout&lt;/SPAN&gt;&lt;SPAN&gt;--&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;// &amp;nbsp; &amp;nbsp;while(Uart_GetStatus(UART_LPUART_INTERNAL_CHANNEL, &amp;amp;tempByte, UART_SEND) == UART_STATUS_OPERATION_ONGOING);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;FS26_Cbk_GptNotification0&lt;/SPAN&gt;&lt;SPAN&gt;()&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;bWdRefresh&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt; &lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WdRefresh&lt;/SPAN&gt;&lt;SPAN&gt;();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;Gpt_StopTimer&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;Gpt_StartTimer&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;10000&lt;/SPAN&gt;&lt;SPAN&gt;U&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;//UART_Print("Gpt Noti\n");&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;/*!&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;\brief&lt;/SPAN&gt;&lt;SPAN&gt; The main function for the project.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;\details&lt;/SPAN&gt;&lt;SPAN&gt; The startup initialization sequence is the following:&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;* - startup asm routine&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;* - main()&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;int&lt;/SPAN&gt; &lt;SPAN&gt;main&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Write your code here */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; boolean &lt;/SPAN&gt;&lt;SPAN&gt;bPass&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_RxFrameType&lt;/SPAN&gt; &lt;SPAN&gt;xRxData&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp;/* Received data structure. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; Std_ReturnType &lt;/SPAN&gt;&lt;SPAN&gt;eReturnValue&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; E_OK;&lt;/SPAN&gt;&lt;SPAN&gt; /* Error status. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint8 &lt;/SPAN&gt;&lt;SPAN&gt;errorCounter&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;FF&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;/* Error counter*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint16 &lt;/SPAN&gt;&lt;SPAN&gt;u16Answer&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint8 &lt;/SPAN&gt;&lt;SPAN&gt;u8MaskedValue&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;U&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint32 &lt;/SPAN&gt;&lt;SPAN&gt;u32DelayCount&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint8 &lt;/SPAN&gt;&lt;SPAN&gt;u8SWInput&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; uint32 &lt;/SPAN&gt;&lt;SPAN&gt;u32PrintCount&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WuSrcType&lt;/SPAN&gt; &lt;SPAN&gt;wkSrc&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WuPolType&lt;/SPAN&gt; &lt;SPAN&gt;wkPol&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Write your code here */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Initialize Mcu module */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Mcu_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Initialize Mcu Clock */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Mcu_InitClock&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;McuClockSettingConfig_0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#if&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;MCU_NO_PLL&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt; &lt;SPAN&gt;STD_OFF&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Wait until PLL is locked */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;while&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;Mcu_GetPllStatus&lt;/SPAN&gt;&lt;SPAN&gt;() &lt;/SPAN&gt;&lt;SPAN&gt;!=&lt;/SPAN&gt; &lt;SPAN&gt;MCU_PLL_LOCKED&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Use PLL clock */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Mcu_DistributePllClock&lt;/SPAN&gt;&lt;SPAN&gt;();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#endif&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Mcu_SetMode&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Call OsIf timmer */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;OsIf_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Platform initialization */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Platform_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Port initialization */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Port_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /*UART initialization*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Uart_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* SPI initialization */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* GPT initialization */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Gpt_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* ICU initialization */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Icu_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt;Init_drivers&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Mcu_ResetType&lt;/SPAN&gt; &lt;SPAN&gt;resetReason&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;Mcu_GetResetReason&lt;/SPAN&gt;&lt;SPAN&gt;();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt;Mcu Reset Reason : &lt;/SPAN&gt;&lt;SPAN&gt;%d&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;, (uint8)resetReason);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /*start wdg for fs26 wd Sbc_fs26_WdRefrsh*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Gpt_EnableNotification&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt;GPT Started&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Gpt_StartTimer&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;10000&lt;/SPAN&gt;&lt;SPAN&gt;U&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Driver and device initialization. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;eReturnValue&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;Sbc_fs26_Init&lt;/SPAN&gt;&lt;SPAN&gt;(NULL_PTR);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;eReturnValue&lt;/SPAN&gt; &lt;SPAN&gt;!=&lt;/SPAN&gt;&lt;SPAN&gt; E_OK)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;bPass&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /*fs26 go to normal mode*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;bPass&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;do&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"--------------Try FS26 Device Initialization--------------&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;eReturnValue&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;Sbc_fs26_InitDevice&lt;/SPAN&gt;&lt;SPAN&gt;();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_ReadRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_STATES_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;b&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;u16ReadData&lt;/SPAN&gt; &lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt; &lt;SPAN&gt;SBC_FS26_FS_FS_STATES_MASK&lt;/SPAN&gt;&lt;SPAN&gt;))&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"--------Success FS26 Device Initialization------------&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WdRefresh&lt;/SPAN&gt;&lt;SPAN&gt;();&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;bPass&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;bWdRefresh&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;else&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;// Sbc_fs26_WriteRegister(TRUE, SBC_FS26_FS_WD_TOKEN_ADDR, 0x5AB2);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;bWdRefresh&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; } &lt;/SPAN&gt;&lt;SPAN&gt;while&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;bPass&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt; &lt;SPAN&gt;FALSE&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_ReadRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_STATES_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_DBG_MODE_DEBUG&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;u16ReadData&lt;/SPAN&gt; &lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt; &lt;SPAN&gt;SBC_FS26_FS_DBG_MODE_MASK&lt;/SPAN&gt;&lt;SPAN&gt;))&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt;After Init, FS26 - Exit DEBUG MODE&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WriteRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_STATES_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_EXIT_DBG_MODE_MASK&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_ReadRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_STATES_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;do&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;u32DelayCount&lt;/SPAN&gt; &lt;SPAN&gt;!=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt; &lt;SPAN&gt;&amp;amp;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;u32DelayCount&lt;/SPAN&gt; &lt;SPAN&gt;%&lt;/SPAN&gt; &lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;112A880&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;))&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;u32PrintCount&lt;/SPAN&gt; &lt;SPAN&gt;+=&lt;/SPAN&gt; &lt;SPAN&gt;1&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt; SW Waiting - &lt;/SPAN&gt;&lt;SPAN&gt;%d&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;u32PrintCount&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;u32DelayCount&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;else&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;// UART_Print("\t SW Input Waiting - 3, %d\n", u32DelayCount);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;u32DelayCount&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;u8SWInput&lt;/SPAN&gt; &lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;Dio_ReadChannel&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;DioConf_DioChannel_USER_SW0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; } &lt;/SPAN&gt;&lt;SPAN&gt;while&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;u8SWInput&lt;/SPAN&gt; &lt;SPAN&gt;!=&lt;/SPAN&gt;&lt;SPAN&gt; STD_HIGH);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt; SW Input Confirmed&lt;/SPAN&gt;&lt;SPAN&gt;\n\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_ReadRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_STATES_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;b&lt;/SPAN&gt; &lt;SPAN&gt;==&lt;/SPAN&gt;&lt;SPAN&gt; (&lt;/SPAN&gt;&lt;SPAN&gt;xRxData&lt;/SPAN&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;SPAN&gt;u16ReadData&lt;/SPAN&gt; &lt;SPAN&gt;&amp;amp;&lt;/SPAN&gt; &lt;SPAN&gt;SBC_FS26_FS_FS_STATES_MASK&lt;/SPAN&gt;&lt;SPAN&gt;))&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt;FS26 Is Normal Mode, And Go to LPOff Mode&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_SetWakeup&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;wkSrc&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;wkPol&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;// Sbc_fs26_SetOperatingMode(SBC_FS26_OPMODE_STANDBY);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;// Sbc_fs26_SetOperatingMode(SBC_FS26_OPMODE_LPOFF);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Icu_EnableEdgeDetection&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Icu_EnableNotification&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Icu_EnableWakeup&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Icu_SetMode&lt;/SPAN&gt;&lt;SPAN&gt;(ICU_MODE_SLEEP);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;UART_Print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;\t&lt;/SPAN&gt;&lt;SPAN&gt;Go to Standby or LPOFF&lt;/SPAN&gt;&lt;SPAN&gt;\n&lt;/SPAN&gt;&lt;SPAN&gt;"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; /* Go to pre LPOFF from Normal. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WriteRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_LP_REQ_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, SBC_FS26_OPMODE_LPOFF);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; /* Go to LPOFF from pre LPOFF. */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Sbc_fs26_WriteRegister&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;TRUE&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_LP_REQ_ADDR&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;SBC_FS26_FS_FS_LP_REQ_LPOFF&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;/** @} */&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Regard&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 05 Feb 2024 06:18:51 GMT</pubDate>
    <dc:creator>NewbieNerd</dc:creator>
    <dc:date>2024-02-05T06:18:51Z</dc:date>
    <item>
      <title>s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1791595#M30852</link>
      <description>&lt;P&gt;Hello S32K3 team!&lt;BR /&gt;I am currently attempting to control FS26 on the S32K312EVB.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;Whenever I query 'FS_STATE', 'REG_CORRUPT' is always in a high state. The calculations for all init_register and init_not_register values are consistent. Please inform me how to reset this state.&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;Even after successfully attempting 'WD_Refresh', it does not switch to 'Normal state' and remains in 'Safety Outputs not released' status. Is this related to issue number 1?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;The system resets when I input the debug_mode_exit value. What could be the issue?&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Regard&lt;/P&gt;</description>
      <pubDate>Fri, 19 Jan 2024 05:38:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1791595#M30852</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-19T05:38:57Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1792615#M30918</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="guoweisun_0-1705901926057.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/259312i6B5576219A05D43D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="guoweisun_0-1705901926057.png" alt="guoweisun_0-1705901926057.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Does the RSTB released? what about the ABIST/LBIST states?OK or not?&lt;/P&gt;</description>
      <pubDate>Mon, 22 Jan 2024 05:39:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1792615#M30918</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-22T05:39:31Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1792652#M30921</link>
      <description>&lt;P&gt;Hello! guoweisun&lt;BR /&gt;&lt;BR /&gt;When I read fs_diag_safety1 Address:&lt;/P&gt;&lt;P&gt;fs_states = 0xA&lt;/P&gt;&lt;P&gt;and&lt;/P&gt;&lt;P&gt;abist1_pass = 0x1,&lt;BR /&gt;abist2_done = 0x1,&lt;BR /&gt;abist2_pass = 0x0,&lt;BR /&gt;lbist_Status = 0x3&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The behavior is the same whether lauch_abist2 is 0 or 1.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 00:08:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1792652#M30921</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T00:08:53Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793384#M30958</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="guoweisun_0-1705978895459.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/259524i710B82554E40E853/image-size/medium?v=v2&amp;amp;px=400" role="button" title="guoweisun_0-1705978895459.png" alt="guoweisun_0-1705978895459.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;I think you need release FS0B next,but before do that you need&amp;nbsp; refresh WD till fault error counter decrease to '0'.&lt;/P&gt;
&lt;P&gt;after release FS0B you will enter into Normal mode.&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 03:03:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793384#M30958</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T03:03:11Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793463#M30962</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;After the FS State changed to the FS0B_ASSERT state, it was confirmed that the value of the Fault Error Count was 0. Then, when attempting to release FS0B and FS1B, the FS State immediately changes to FS_Init and then resets.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="NewbieNerd_0-1705988453393.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/259544i065A58948C4411EF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="NewbieNerd_0-1705988453393.png" alt="NewbieNerd_0-1705988453393.png" /&gt;&lt;/span&gt;(&lt;SPAN&gt;Rel_State is the state after attempting to release FSxB)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Regard&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 05:42:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793463#M30962</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T05:42:12Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793468#M30963</link>
      <description>&lt;P&gt;Please try to disable FCCU function and DISABLE the WD.&lt;/P&gt;
&lt;P&gt;And also need confirm there is no any error for UV/OV monitor error,if have please clear these error.&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 05:50:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793468#M30963</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T05:50:02Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793479#M30965</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1. Does disabling the FCCU function mean changing the value of FCCU monitoring to No Monitoring? If so, we are currently in continuous testing.&lt;/P&gt;&lt;P&gt;2. Does disabling the WD mean changing the FS_State to FS_Init and then applying a WD_Period value of 0?&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 06:13:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793479#M30965</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T06:13:28Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793487#M30967</link>
      <description>&lt;P&gt;Both of your questions,the answer are YES.&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 06:22:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793487#M30967</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T06:22:30Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793518#M30971</link>
      <description>&lt;P&gt;&lt;SPAN class=""&gt;Hi guoweisun&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="NewbieNerd_0-1705992868377.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/259558i3EBFBBE11A656C65/image-size/medium?v=v2&amp;amp;px=400" role="button" title="NewbieNerd_0-1705992868377.png" alt="NewbieNerd_0-1705992868377.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;I read the values of the registers that were set during the process. Even without making any separate changes, the value of FS_State changes to Invalid after attempting to Release FSXB.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;Regard&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 06:57:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793518#M30971</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T06:57:04Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793523#M30972</link>
      <description>&lt;P&gt;Seems some monitor UV/OV error happened,you can read it out.&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 06:58:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793523#M30972</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T06:58:25Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793546#M30975</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hi guoweisun&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="NewbieNerd_0-1705994669664.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/259569i084A1C705CD0DA84/image-size/medium?v=v2&amp;amp;px=400" role="button" title="NewbieNerd_0-1705994669664.png" alt="NewbieNerd_0-1705994669664.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The FS_STATE still hasn't changed to Normal... The last two lines are the values after attempting to release FSXB. '1' is the value of the UV/OV State, and '2' is the value of FS_STATE.&lt;BR /&gt;&lt;BR /&gt;Thanks to your help&lt;BR /&gt;Regard&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 07:25:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793546#M30975</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T07:25:41Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793554#M30976</link>
      <description>&lt;P&gt;What's the fault error counter value?&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 07:29:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793554#M30976</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T07:29:05Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793564#M30977</link>
      <description>&lt;P&gt;&lt;SPAN&gt;This is 'FS_I_FSSM' Register - [3:0]&lt;BR /&gt;It mesns 'FLT_ERR_CNT'&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 07:33:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793564#M30977</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T07:33:59Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793567#M30978</link>
      <description>&lt;P&gt;The value of&amp;nbsp;&lt;SPAN&gt;FLT_ERR_CNT should be decrease into 0.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 07:35:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793567#M30978</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T07:35:26Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793570#M30980</link>
      <description>&lt;P&gt;&lt;SPAN&gt;The current value is 0. Should I manually induce a fault and then decrease it back to 0?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 07:37:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793570#M30980</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T07:37:28Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793580#M30981</link>
      <description>&lt;P&gt;If the&amp;nbsp;&lt;SPAN&gt;FLT_ERR_CNT is 0,you can&amp;nbsp; release FS0B no problem then enter into normal mode.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 07:44:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793580#M30981</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2024-01-23T07:44:18Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793633#M30983</link>
      <description>&lt;P&gt;doesn't enter normal.&lt;/P&gt;&lt;P&gt;what should I check another register?&lt;/P&gt;</description>
      <pubDate>Tue, 23 Jan 2024 08:49:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1793633#M30983</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-01-23T08:49:51Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801593#M31426</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/226113"&gt;@NewbieNerd&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Can you provide the project zip, I am working on the SBC FS26 with s32k312 watchdog refresh.&lt;/P&gt;&lt;P&gt;It could me help for me.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Feb 2024 04:35:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801593#M31426</guid>
      <dc:creator>Akhil1</dc:creator>
      <dc:date>2024-02-05T04:35:23Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801629#M31429</link>
      <description>&lt;P&gt;Hi Akhil1!&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for your interest. However, due to company policy, we are unable to upload data.&lt;/SPAN&gt;&lt;BR /&gt;and I Sovled this problem!&lt;BR /&gt;I think It is WD Refresh Data and timing problem.&lt;BR /&gt;first I tried 0xA43D, 0x4A9A, 0x9535 ~ WD refresh at Release FSxB before, and &lt;SPAN&gt;After acquiring the WD Token and applying the challenger formula, continuing the WD refresh did not result in any issues.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;regard&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Feb 2024 05:49:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801629#M31429</guid>
      <dc:creator>NewbieNerd</dc:creator>
      <dc:date>2024-02-05T05:49:09Z</dc:date>
    </item>
    <item>
      <title>Re: s32k312 + fs26 control problem</title>
      <link>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801636#M31431</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/226113"&gt;@NewbieNerd&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;I am yet to start SBC FS26 with S32K312 with RTD 2.0.3 version, I want to do the watchdog refresh for every 50 ms, how can I do it.&lt;/P&gt;&lt;P&gt;when I stop watchdog refresh...MCU should reset&lt;/P&gt;&lt;P&gt;How can I do it? could you please help me with this.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Feb 2024 05:54:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k312-fs26-control-problem/m-p/1801636#M31431</guid>
      <dc:creator>Akhil1</dc:creator>
      <dc:date>2024-02-05T05:54:41Z</dc:date>
    </item>
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