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    <title>S32K中的主题 Re: S32K144 LPSPI5 eDMA channel map</title>
    <link>https://community.nxp.com/t5/S32K/S32K144-LPSPI5-eDMA-channel-map/m-p/1788078#M30605</link>
    <description>&lt;P&gt;As per S32K3XXRM_Rev_5, chapter 13 DMAMUX:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="cuongnguyenphu_0-1705069843252.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/258022iF123FCCF4F0AA279/image-size/medium?v=v2&amp;amp;px=400" role="button" title="cuongnguyenphu_0-1705069843252.png" alt="cuongnguyenphu_0-1705069843252.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;In S32K344 has 32 eDMA channels, so DMAMUX1 is mapped to TCD16-31&lt;/P&gt;</description>
    <pubDate>Fri, 12 Jan 2024 14:31:33 GMT</pubDate>
    <dc:creator>cuongnguyenphu</dc:creator>
    <dc:date>2024-01-12T14:31:33Z</dc:date>
    <item>
      <title>S32K144 LPSPI5 eDMA channel map</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-LPSPI5-eDMA-channel-map/m-p/1775392#M29654</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I want to use LPSPI5 with DMA to automatic send and receive data.&lt;/P&gt;&lt;P&gt;In the S32Kxx_DMAMUX_map.xlsx, LPSPI5 TX/RX are maped to DMAMUX1.&lt;/P&gt;&lt;P&gt;From S32K3xxRM.pdf chapter 13.1.1, DMAMUX_1 channels are mapped to eDMA_TCD 6-12.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="S32K3XXRM_DMAMUX.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/254610i983C9630358F76BB/image-size/large?v=v2&amp;amp;px=999" role="button" title="S32K3XXRM_DMAMUX.png" alt="S32K3XXRM_DMAMUX.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;According to above, I try to configure MCAL with EBTresos and RTD package SW32K3_RTD_4.4_2.0.2.&lt;/P&gt;&lt;P&gt;I find that in the MclMcl config/DMA logic channel/Logic channel configuration, DMAMUX_1 source is unconfigurable when the selection of DMA hardware channle is lower than 16. When DMA hardware channle is lower than 16, only DMAMUX_0 is configurable. According to the reference manucal, DMAMUX_1 source shall be configurable when DMA hardware channel is 6-12.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="eb2.png" style="width: 717px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/254612iA621CDB86D22D302/image-size/large?v=v2&amp;amp;px=999" role="button" title="eb2.png" alt="eb2.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="eb1.png" style="width: 592px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/254611iE45CD99E902FD83D/image-size/large?v=v2&amp;amp;px=999" role="button" title="eb1.png" alt="eb1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I looked into the source code, in the intializtion code, the DMAMUX intance is calculated by divide TCD channel with 16 too.&lt;/P&gt;&lt;P&gt;Is there something I missed in the reference manual or I misunderstand, why the configuration in EBTresos differs from description in reference charpter 13.1.1?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 15 Dec 2023 07:38:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-LPSPI5-eDMA-channel-map/m-p/1775392#M29654</guid>
      <dc:creator>Mark_977</dc:creator>
      <dc:date>2023-12-15T07:38:43Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 LPSPI5 eDMA channel map</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-LPSPI5-eDMA-channel-map/m-p/1788078#M30605</link>
      <description>&lt;P&gt;As per S32K3XXRM_Rev_5, chapter 13 DMAMUX:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="cuongnguyenphu_0-1705069843252.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/258022iF123FCCF4F0AA279/image-size/medium?v=v2&amp;amp;px=400" role="button" title="cuongnguyenphu_0-1705069843252.png" alt="cuongnguyenphu_0-1705069843252.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;In S32K344 has 32 eDMA channels, so DMAMUX1 is mapped to TCD16-31&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jan 2024 14:31:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-LPSPI5-eDMA-channel-map/m-p/1788078#M30605</guid>
      <dc:creator>cuongnguyenphu</dc:creator>
      <dc:date>2024-01-12T14:31:33Z</dc:date>
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