<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: S32k312 INTM latency</title>
    <link>https://community.nxp.com/t5/S32K/S32k312-INTM-latency/m-p/1783585#M30276</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217679"&gt;@jhuang1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;You're configuring Option B&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_0-1704439955743.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256815iEFC9295F4BE993B7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_0-1704439955743.png" alt="Nhi_Nguyen_0-1704439955743.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;So, PIT is running with clock: 30 MHz, INTM running with clock 60Mhz, Core clock is 120 MHz.&lt;/P&gt;
&lt;P&gt;I tried to configurate that same with you.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_1-1704445012959.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256847iC28DD1A144481891/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_1-1704445012959.png" alt="Nhi_Nguyen_1-1704445012959.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_0-1704446461670.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256861i56CC98988E04D0DF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_0-1704446461670.png" alt="Nhi_Nguyen_0-1704446461670.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_1-1704446480666.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256862i661E4F0A90985BFB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_1-1704446480666.png" alt="Nhi_Nguyen_1-1704446480666.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_2-1704446516840.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256863i0B86CABD19BE674F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_2-1704446516840.png" alt="Nhi_Nguyen_2-1704446516840.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_3-1704446530182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256864i24EB58C84CBA477E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_3-1704446530182.png" alt="Nhi_Nguyen_3-1704446530182.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Then, I have:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_4-1704446570194.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256865iF8EFDF685160947D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_4-1704446570194.png" alt="Nhi_Nguyen_4-1704446570194.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;This is issue case:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_5-1704446587399.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256866iDD4C45260043D831/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_5-1704446587399.png" alt="Nhi_Nguyen_5-1704446587399.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;So, please ensure that you provide enough wait time PIT interrupt before stop timer.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Nhi&lt;/P&gt;</description>
    <pubDate>Fri, 05 Jan 2024 09:24:23 GMT</pubDate>
    <dc:creator>Nhi_Nguyen</dc:creator>
    <dc:date>2024-01-05T09:24:23Z</dc:date>
    <item>
      <title>S32k312 INTM latency</title>
      <link>https://community.nxp.com/t5/S32K/S32k312-INTM-latency/m-p/1778987#M29882</link>
      <description>&lt;P&gt;&amp;nbsp; &amp;nbsp; I want to add INTM to my project to monitor pit0, pit1 and an siul2 external interrupt. The period of pit0 and pit1 are 1ms and 5ms each, so I set the INTM latency of them to 15000 which leads to a latency of 250us(INM reference clock is 60MHz ) at first, but it resulted in an NCF6 error. Then I set the latency to 60000 which leads to a latency of 1ms, the error still exist. The NCF6 error disappeared until I set the latency to a huge number or disable the INTM. I think maybe I made some mistakes on the INTM setting, so I attached the setting page after the note.&lt;/P&gt;</description>
      <pubDate>Fri, 22 Dec 2023 03:45:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k312-INTM-latency/m-p/1778987#M29882</guid>
      <dc:creator>jhuang1</dc:creator>
      <dc:date>2023-12-22T03:45:38Z</dc:date>
    </item>
    <item>
      <title>Re: S32k312 INTM latency</title>
      <link>https://community.nxp.com/t5/S32K/S32k312-INTM-latency/m-p/1783585#M30276</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217679"&gt;@jhuang1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;You're configuring Option B&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_0-1704439955743.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256815iEFC9295F4BE993B7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_0-1704439955743.png" alt="Nhi_Nguyen_0-1704439955743.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;So, PIT is running with clock: 30 MHz, INTM running with clock 60Mhz, Core clock is 120 MHz.&lt;/P&gt;
&lt;P&gt;I tried to configurate that same with you.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_1-1704445012959.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256847iC28DD1A144481891/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_1-1704445012959.png" alt="Nhi_Nguyen_1-1704445012959.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_0-1704446461670.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256861i56CC98988E04D0DF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_0-1704446461670.png" alt="Nhi_Nguyen_0-1704446461670.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_1-1704446480666.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256862i661E4F0A90985BFB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_1-1704446480666.png" alt="Nhi_Nguyen_1-1704446480666.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_2-1704446516840.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256863i0B86CABD19BE674F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_2-1704446516840.png" alt="Nhi_Nguyen_2-1704446516840.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_3-1704446530182.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256864i24EB58C84CBA477E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_3-1704446530182.png" alt="Nhi_Nguyen_3-1704446530182.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Then, I have:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_4-1704446570194.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256865iF8EFDF685160947D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_4-1704446570194.png" alt="Nhi_Nguyen_4-1704446570194.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;This is issue case:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nhi_Nguyen_5-1704446587399.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/256866iDD4C45260043D831/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nhi_Nguyen_5-1704446587399.png" alt="Nhi_Nguyen_5-1704446587399.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;So, please ensure that you provide enough wait time PIT interrupt before stop timer.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Nhi&lt;/P&gt;</description>
      <pubDate>Fri, 05 Jan 2024 09:24:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k312-INTM-latency/m-p/1783585#M30276</guid>
      <dc:creator>Nhi_Nguyen</dc:creator>
      <dc:date>2024-01-05T09:24:23Z</dc:date>
    </item>
  </channel>
</rss>

