https://community.nxp.com/t5/S32K/Ethernet-Rx-Clk-in-S32k388/m-p/1753595#M28465 <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="myehiash_0-1699371552948.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/248834iE4296662C34CA90E/image-size/medium?v=v2&amp;px=400" role="button" title="myehiash_0-1699371552948.png" alt="myehiash_0-1699371552948.png" /></span></P><P><SPAN>In Ethernet Module (GMAC0) the Rx_CLK selector must be set to 1 in bit 13 in Register "DCMRWF3" How to configure this selector from tresos ?</SPAN></P> Tue, 07 Nov 2023 15:39:57 GMT myehiash 2023-11-07T15:39:57Z https://community.nxp.com/t5/S32K/Ethernet-Rx-Clk-in-S32k388/m-p/1753595#M28465 <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="myehiash_0-1699371552948.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/248834iE4296662C34CA90E/image-size/medium?v=v2&amp;px=400" role="button" title="myehiash_0-1699371552948.png" alt="myehiash_0-1699371552948.png" /></span></P><P><SPAN>In Ethernet Module (GMAC0) the Rx_CLK selector must be set to 1 in bit 13 in Register "DCMRWF3" How to configure this selector from tresos ?</SPAN></P> Tue, 07 Nov 2023 15:39:57 GMT https://community.nxp.com/t5/S32K/Ethernet-Rx-Clk-in-S32k388/m-p/1753595#M28465 myehiash 2023-11-07T15:39:57Z https://community.nxp.com/t5/S32K/Ethernet-Rx-Clk-in-S32k388/m-p/1754548#M28499 <P>Hi&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/224362">@myehiash</a>&nbsp;,</P> <P>Driver didn't support this feature. So, if you want to configure MAC_Rx_Clk from external pin Rx_Clk, you need to configure it through CGM_MUX 7.</P> <P>Best regards,</P> <P>Nhi&nbsp;</P> Thu, 09 Nov 2023 02:04:35 GMT https://community.nxp.com/t5/S32K/Ethernet-Rx-Clk-in-S32k388/m-p/1754548#M28499 Nhi_Nguyen 2023-11-09T02:04:35Z