S32KのトピックRe: lwip stack ping test replies the request with mismatched sequence number message

lwip stack ping test replies the request with mismatched sequence number message

zjldabing — Tue, 10 Oct 2023 09:13:14 GMT

I developed a board with S32K344 and it can run the lwip demo project "lwip_s32k344" correctlly.I can ping the board from my PC.However, it works abnormally when I try to implement the demo code into my own project on the board.When I ping it from PC, the reply message sequence number is always smaller than the request message sequence number. That means the board does not reply the 1st request and it replies the following request with the one for previous request.

I have compared the setting of demo project with that of my own project.There is no obvious difference from my point of view. What's the problem here and how can it be solved? Attach my project.

Re: lwip stack ping test replies the request with mismatched sequence number message

zjldabing — Tue, 10 Oct 2023 11:03:27 GMT

I find the problem is caused by different compiling settings between demo project and my project.My project has defined D_CACHE_ENABLE.Seems the D.CACHE is a specific feather of M7 core(CM3 and CM4 does not have it).I remove the definition of D_CACHE_ENABLE and project works well.

Re: lwip stack ping test replies the request with mismatched sequence number message

lukaszadrapa — Tue, 10 Oct 2023 12:13:07 GMT

Hi @zjldabing

yes, it's caused by data cache. Let me copy here from some other discussion:

The default project setting enabled Cache, and the lwip heap memory was allocated from cacheable region. Thus there are risks about data inconsistency when CPU and EMAC uDMA access asynchronously. Two way to avoid this issue:

① Just disable the D-cache, the original Lwip_s32k344 demo use the same way. It's convenient, but lower running efficiency for other applications.

② Allocate the lwip heap from non-cacheable region. Thus the cache can keep enable, it's good. When use this way, you need to make below changes:

a) Increase the non-cacheable region (decrease shareable region) in linker file and add the lwip non-cacheable heap region for next use.

b) Add lwip memory allocation macro in .mex tcpip component "user setting" page, thus it would be generated in lwipcfg.h, and to replace the default allocation way in "arch.h" which allocate memory from shareable region.

Regards,

Lukas