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    <title>topic WDG interrupt with RTD AUTOSAR 4.4 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715013#M26668</link>
    <description>&lt;P&gt;Dear NXP community,&lt;/P&gt;&lt;P&gt;I´m working with NXP S32K144 micro and RTD AUTOSAR 4.4&lt;/P&gt;&lt;P&gt;After configuring RTD all seems to be OK, WDG resets are generated at the time expected, but the problem is that interrupts are not launched.&amp;nbsp;&lt;/P&gt;&lt;P&gt;You can see the register value in the picture attached.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In order to force the WDG reset I commented the call to&amp;nbsp; Wdg_ChannelSetTriggerCondition(WDG_IPW_INSTANCE0, Timeout) at&amp;nbsp;&amp;nbsp;Wdg_43_Instance0.c&lt;/P&gt;&lt;P&gt;Am I doing something wrong?&lt;/P&gt;&lt;P&gt;Could you help me?&lt;/P&gt;&lt;P&gt;Thanks in advance!&lt;/P&gt;</description>
    <pubDate>Thu, 31 Aug 2023 11:23:18 GMT</pubDate>
    <dc:creator>HectorNadal</dc:creator>
    <dc:date>2023-08-31T11:23:18Z</dc:date>
    <item>
      <title>WDG interrupt with RTD AUTOSAR 4.4</title>
      <link>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715013#M26668</link>
      <description>&lt;P&gt;Dear NXP community,&lt;/P&gt;&lt;P&gt;I´m working with NXP S32K144 micro and RTD AUTOSAR 4.4&lt;/P&gt;&lt;P&gt;After configuring RTD all seems to be OK, WDG resets are generated at the time expected, but the problem is that interrupts are not launched.&amp;nbsp;&lt;/P&gt;&lt;P&gt;You can see the register value in the picture attached.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In order to force the WDG reset I commented the call to&amp;nbsp; Wdg_ChannelSetTriggerCondition(WDG_IPW_INSTANCE0, Timeout) at&amp;nbsp;&amp;nbsp;Wdg_43_Instance0.c&lt;/P&gt;&lt;P&gt;Am I doing something wrong?&lt;/P&gt;&lt;P&gt;Could you help me?&lt;/P&gt;&lt;P&gt;Thanks in advance!&lt;/P&gt;</description>
      <pubDate>Thu, 31 Aug 2023 11:23:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715013#M26668</guid>
      <dc:creator>HectorNadal</dc:creator>
      <dc:date>2023-08-31T11:23:18Z</dc:date>
    </item>
    <item>
      <title>Re: WDG interrupt with RTD AUTOSAR 4.4</title>
      <link>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715353#M26680</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/187791"&gt;@HectorNadal&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;On WDOG timeout, the WDOG module immediately requests a reset in the Reset Control Module (RCM). So, if the&amp;nbsp;WDOG&amp;nbsp;counter is not refreshed, its interrupt triggers a reset.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="VaneB_0-1693511761807.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/239173i2F120AB1EA3326E0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="VaneB_0-1693511761807.png" alt="VaneB_0-1693511761807.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;The reset request to RCM can be delayed by 128 bus clock cycles if the WDOG interrupt is enabled (WDOG_CS[INT] = 1). If enabled, the WDOG interrupt vector is fetched or becomes pending in NVIC. After the delay, the reset is requested in RCM.&lt;/P&gt;
&lt;P&gt;If you want to&amp;nbsp;&lt;SPAN&gt;force a reset,&amp;nbsp;set the Wdg Trigger Condition (Wdg_43_Instance0_SetTriggerCondition) just once to generate a timeout.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;B.R.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;VaneB&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 31 Aug 2023 20:02:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715353#M26680</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2023-08-31T20:02:12Z</dc:date>
    </item>
    <item>
      <title>Re: WDG interrupt with RTD AUTOSAR 4.4</title>
      <link>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715790#M26703</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thanks for your answer.&lt;/P&gt;&lt;P&gt;Maybe I din´t explained the issue properly.&amp;nbsp;&lt;/P&gt;&lt;P&gt;WDG is generating the reset but interrupt handler is not called. I have tried to change interrupt clase to 0 but it´s not called anyway.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you help me?&lt;/P&gt;&lt;P&gt;Thanks.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 01 Sep 2023 12:24:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1715790#M26703</guid>
      <dc:creator>HectorNadal</dc:creator>
      <dc:date>2023-09-01T12:24:59Z</dc:date>
    </item>
    <item>
      <title>Re: WDG interrupt with RTD AUTOSAR 4.4</title>
      <link>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1716658#M26759</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/187791"&gt;@HectorNadal&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If in&amp;nbsp;Watchdog Control and Status Register (CS), you have Watchdog Interrupt (INT) equal to 0, the reset request is immediately generated,&amp;nbsp;so you will not be able to see the&amp;nbsp;Watchdog Interrupt Flag.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;As I mentioned before, you can delay the Watchdog resets by 128 bus clocks from the interrupt vector fetch.&lt;/P&gt;</description>
      <pubDate>Mon, 04 Sep 2023 22:18:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/WDG-interrupt-with-RTD-AUTOSAR-4-4/m-p/1716658#M26759</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2023-09-04T22:18:26Z</dc:date>
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