<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>S32KのトピックRe: S32K312 Crypto</title>
    <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701826#M25898</link>
    <description>&lt;P&gt;Hi:&lt;/P&gt;&lt;P&gt;&amp;nbsp;I don't kwon what the E5 chip is . Do you have any other information?&lt;/P&gt;&lt;P&gt;In chapter 31 boot overview of S32K3XXRM.pdf, there is a table that shows some content about HSE FW.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Following this picture, K3 chip don't program HSE firmware by fault，so the crypto's function can't work?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Faker_0-1691571327953.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235750i25A6FAC933B0F65B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Faker_0-1691571327953.png" alt="Faker_0-1691571327953.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Do you have some demos of generating random? Could I have a copy. Thank you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 09 Aug 2023 09:07:10 GMT</pubDate>
    <dc:creator>Faker</dc:creator>
    <dc:date>2023-08-09T09:07:10Z</dc:date>
    <item>
      <title>S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1661757#M23493</link>
      <description>&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;My current project requires the use of the Crypto driver for the S32K312. The problem I am currently encountering is that the CMAC_Generate and CMAC_Verify functions work fine with the Crypto Demo provided by NXP in the same MCAL configuration.&lt;/P&gt;&lt;P&gt;But when I call these two functions with my own program, the Crypto_Hse_TranslateHseResponse function returns E_NOT_OK. I have done the memory handling of the data with reference to the demo project, for example&lt;BR /&gt;#define CRYPTO_START_SEC_VAR_INIT_8_NO_CACHEABLE&lt;BR /&gt;#define CRYPTO_STOP_SEC_VAR_INIT_8_NO_CACHEABLE.&lt;BR /&gt;I have checked that the values of the parameters passed are the same.&lt;/P&gt;&lt;P&gt;What should I do to solve this problem?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Cppppy_0-1685613768034.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225835iC7ECB07DED342FF2/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Cppppy_0-1685613768034.png" alt="Cppppy_0-1685613768034.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 10:04:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1661757#M23493</guid>
      <dc:creator>Cppppy</dc:creator>
      <dc:date>2023-06-01T10:04:05Z</dc:date>
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    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1664260#M23672</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/214449"&gt;@Cppppy&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Could you show me the line of code in the Hse_Ip_ServiceRequest() that occurred this error?&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
      <pubDate>Tue, 06 Jun 2023 10:52:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1664260#M23672</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-06-06T10:52:52Z</dc:date>
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    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700118#M25809</link>
      <description>&lt;P&gt;Hi,I also meet this problem.&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Send the request to HSE driver */&lt;BR /&gt;HseResponse = Hse_Ip_ServiceRequest(u8MuInstance, u8MuChannel, pHseIpReq, pHseSrvDescriptor);&lt;BR /&gt;/* Translate the message received from HSE to a Std_ReturnType value */&lt;BR /&gt;RetVal = Crypto_Hse_TranslateHseResponse(HseResponse);&lt;/P&gt;&lt;P&gt;RetVal is&amp;nbsp;CRYPTO_RET_OPERATION_TIMEOUT.&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2023 09:46:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700118#M25809</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-07T09:46:25Z</dc:date>
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    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700823#M25848</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/179808"&gt;@Faker&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;You can refer to the attached example to fix your issue.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
      <pubDate>Tue, 08 Aug 2023 07:28:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700823#M25848</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-08-08T07:28:44Z</dc:date>
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      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700880#M25850</link>
      <description>&lt;P&gt;Yes, I refer to S32DS for S32 platform's Crypto demo. This question is in link(&lt;A href="https://community.nxp.com/t5/S32K/S32K324-Crypto-returns-CRYPTO-RET-OPERATION-TIMEOUT/m-p/1700655#M25834" target="_blank"&gt;S32K324 Crypto returns CRYPTO_RET_OPERATION_TIMEOU... - NXP Community&lt;/A&gt;). When I debug App_Aes128EncryptDecryptExample in s32k324 board, it returns timeout error.&lt;/P&gt;&lt;P&gt;In the beginning of main(), it don't need to init clock or mcu(Mcal) module?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Faker_0-1691481465354.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235503i6FB342B256FBF82F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Faker_0-1691481465354.png" alt="Faker_0-1691481465354.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 08 Aug 2023 07:58:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700880#M25850</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-08T07:58:58Z</dc:date>
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    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700931#M25852</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/179808"&gt;@Faker&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Yes, because FIRC was initialized by the HSE core when POR.&lt;/P&gt;
&lt;P&gt;Did you use correctly the chip's name (E5) with HSE FW release?&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
      <pubDate>Tue, 08 Aug 2023 08:41:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1700931#M25852</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-08-08T08:41:03Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701046#M25860</link>
      <description>&lt;P&gt;S32k324 needs external E5 chip to complete the function of security? There isn't E5 chip in my board.&lt;/P&gt;&lt;P&gt;I always think this module is just in mcu like some peripherals.&lt;/P&gt;</description>
      <pubDate>Tue, 08 Aug 2023 10:55:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701046#M25860</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-08T10:55:26Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701053#M25862</link>
      <description>&lt;P&gt;It means if&amp;nbsp; custom board don't have e&lt;SPAN&gt;xternal &lt;/SPAN&gt;E5 chip,&amp;nbsp; I&amp;nbsp; can use software encryption library to replace it?&lt;/P&gt;</description>
      <pubDate>Tue, 08 Aug 2023 11:06:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701053#M25862</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-08T11:06:31Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701416#M25869</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/179808"&gt;@Faker&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;In the HSE FW Reference noted that&amp;nbsp;the HSE FW&amp;nbsp;&lt;SPAN class="fontstyle0"&gt;release was developed and tested using chip E5.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;So, you can run HSE examples normally on this chip.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Dan&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 00:39:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701416#M25869</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-08-09T00:39:04Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701826#M25898</link>
      <description>&lt;P&gt;Hi:&lt;/P&gt;&lt;P&gt;&amp;nbsp;I don't kwon what the E5 chip is . Do you have any other information?&lt;/P&gt;&lt;P&gt;In chapter 31 boot overview of S32K3XXRM.pdf, there is a table that shows some content about HSE FW.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Following this picture, K3 chip don't program HSE firmware by fault，so the crypto's function can't work?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Faker_0-1691571327953.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235750i25A6FAC933B0F65B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Faker_0-1691571327953.png" alt="Faker_0-1691571327953.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Do you have some demos of generating random? Could I have a copy. Thank you.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 09:07:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701826#M25898</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-09T09:07:10Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701860#M25902</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/179808"&gt;@Faker&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;1. If your chip has "E5" on the surface, then it is an E5 chip.&lt;/P&gt;
&lt;P&gt;2.&amp;nbsp;&lt;SPAN&gt;Following this picture, K3 chip don't program HSE firmware by fault，so the crypto's function can't work? =&amp;gt; That's correct.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;3. Please use the chip correctly with the HSE FW version.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxf78987_0-1691573990723.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235770i4283157C5DD04700/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxf78987_0-1691573990723.png" alt="nxf78987_0-1691573990723.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;4.&lt;SPAN&gt;Do you have some demos of generating random?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;=&amp;gt; Please refer to the Crypto example in the S32K3 package.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 09:41:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1701860#M25902</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-08-09T09:41:26Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1702525#M25920</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="1691630663539.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235872iF4383070E46CFB0F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="1691630663539.png" alt="1691630663539.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This's a chip(S32K324HMS) on my board. Don't have the prefix of "E5" . Does that mean I can't use encryption.&lt;/P&gt;&lt;P&gt; &lt;/P&gt;</description>
      <pubDate>Thu, 10 Aug 2023 01:50:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1702525#M25920</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-10T01:50:59Z</dc:date>
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    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1703928#M26007</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/179808"&gt;@Faker&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Unfortunately, the S32K3 package was only tested on the S32K344, S32K312, and S32K342, and don't test with S32K324 because we don't have this derivative.&lt;/P&gt;
&lt;P&gt;Hence, I can't ensure whether or not S32K324 can successfully load HSE FW.&lt;/P&gt;
&lt;P&gt;From my point of view, you should try to install HSE FW and check whether the Crypto example can run successfully or not. If the result fails, this indicates that your chip can't load the HSE FW present.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Dan&lt;/P&gt;</description>
      <pubDate>Mon, 14 Aug 2023 02:17:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1703928#M26007</guid>
      <dc:creator>DanNguyenDuy</dc:creator>
      <dc:date>2023-08-14T02:17:24Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 Crypto</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1706183#M26151</link>
      <description>&lt;P&gt;OK.Thank you very much.&lt;/P&gt;&lt;P&gt;I will try it after agent hsa given me the file of s32k3x4_hse_fw_0.5.0_1.1.0_pb211004.bin.pink .&lt;/P&gt;</description>
      <pubDate>Thu, 17 Aug 2023 03:02:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-Crypto/m-p/1706183#M26151</guid>
      <dc:creator>Faker</dc:creator>
      <dc:date>2023-08-17T03:02:32Z</dc:date>
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