S32KのトピックRe: S32K324 MII mode

S32K324 MII mode

Junwen — Fri, 28 Jul 2023 08:40:06 GMT

Hi There,

I am developing with S32K324 chip to integrate MII Ethernet driver. EMAC is configured to 100M bps MII mode. After tracking Tx_Packet_Count_Good and Tx_Octet_Count_Good registers during debugging, it seems that tx frames have been transmitted.

However, I couldn't measure any signals on ETH_MII_TXD[0]-ETH_MII_TXD[3] lines. ETH_MII_TCLK can be measured and its frequency is 25MHz.

Is there any suggestions?

Thanks and regards.

Re: S32K324 MII mode

VaneB — Fri, 28 Jul 2023 21:40:00 GMT

Hi @Junwen

I am sorry to inform you that there is no MII mode connection in the EVB of us as far as I know. All the current S32K3 HW kits and Ethernet Adapter cards are RMII only.

However, it can be easy to implement with just tiny tweaks from the RMII mode demo (lwip example).

Change the MII reference clock in .mex clocking.
Change the MII mode in the .mex Gmac component.
Change the "DCMRWF1" bit-7 as the default value for MII mode.
Change the eth PHY initialization mode to MII mode.

Please refer following image:

Also, could you tell me how you measure the ETH_MII_TXD[0]-ETH_MII_TXD[3] lines? And what are you expecting to see?

B.R.

VaneB

Re: S32K324 MII mode

Junwen — Mon, 31 Jul 2023 03:08:44 GMT

Hi VaneB,

Thank you for your quick reply.

I've already modified Gmac configuration to support MII mode. Meanwhile, PHY initialization has been checked, since I can measure the 25M Hz TX and RX clock output using oscilloscope.

I am expected to trigger data output using oscilloscope on those ETH_MII_TXD lines, when using application to send ARP packets. As what you can see in previous comment, Ethernet frame has been sent according to registers. However, no data has been measured.

BR,

Junwen

Re: S32K324 MII mode

VaneB — Tue, 01 Aug 2023 21:42:20 GMT

Hi @Junwen

I am sorry for the inconvenience this may cause.

As I previously mentioned, there is no MII mode connection on the EVBs, so the only information I can share with you is the one provided in my previous reply.

Please contact your NXP representative/FAE/DBM for further support in this part.