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    <title>topic Re: S32K144 Fusa RTS &amp;amp; MPU in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1672701#M24195</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/214124"&gt;@Peter-DK&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;simple example written in C will be better, I guess. Take a look at this one:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5674F-MPU-Initialization-CW210/ta-p/1126354" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5674F-MPU-Initialization-CW210/ta-p/1126354&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;It's for another device but the principle is still the same. See the main function and MPU_Init. It's just about configuration of start address, end address and user rights of individual descriptors. Then there's a test to check the behavior when the access rights are violated. And one note - all the memory resources need to be covered by MPU descriptors once the MPU is enabled. Access to an area which is not covered by descriptors is considered as access violation.&lt;/P&gt;
&lt;P&gt;I do not have this directly for S32K1 devices but I believe this will clear it up.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
    <pubDate>Tue, 20 Jun 2023 11:37:11 GMT</pubDate>
    <dc:creator>lukaszadrapa</dc:creator>
    <dc:date>2023-06-20T11:37:11Z</dc:date>
    <item>
      <title>S32K144 Fusa RTS &amp; MPU</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1670915#M24048</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;We are using the S32K144 with the FuSa RTS and noticed that the device isn't equipped with a standard ARM MPU.&lt;/P&gt;&lt;P&gt;The RTS Blinky example is configuring the MPU to use zones but it won't work because registers are different.&lt;/P&gt;&lt;P&gt;Can someone point us in the right direction or maybe provide some sample code?&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;static const ARM_MPU_Region_t mpu_table[ZONES_NUM][MPU_REGIONS];

extern void stop_on_error(uint32_t cond);

/* Update MPU settings for newly activating Zone */
void osZoneSetup_Callback (uint32_t zone) {

  stop_on_error(zone &amp;gt;= ZONES_NUM);

  ARM_MPU_Disable();
  ARM_MPU_Load(mpu_table[zone], MPU_REGIONS);
  ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
}

/* MPU table specifying MPU regions for all Zones */
static const ARM_MPU_Region_t mpu_table[ZONES_NUM][MPU_REGIONS] = {
  /* Zone 'ZONE_CTRL' */
  {
    // FLASH (0x00000000..0x00020000)
    { .RBAR = ARM_MPU_RBAR(0U, 0x00000000), .RASR = ARM_MPU_RASR_EX(0U, ARM_MPU_AP_RO,   ARM_MPU_ACCESS_NORMAL(ARM_MPU_CACHEP_NOCACHE, ARM_MPU_CACHEP_NOCACHE, 1U), 0x00U, ARM_MPU_REGION_SIZE_128KB) },
    // RAM_SHARED, RAM_EVR (0x20000000..0x20001FFF)
    { .RBAR = ARM_MPU_RBAR(1U, 0x20000000), .RASR = ARM_MPU_RASR_EX(1U, ARM_MPU_AP_FULL, ARM_MPU_ACCESS_NORMAL(ARM_MPU_CACHEP_NOCACHE, ARM_MPU_CACHEP_NOCACHE, 1U), 0x00U, ARM_MPU_REGION_SIZE_8KB) },
    // RAM_CTRL (0x20002000..0x20003FFF)
    { .RBAR = ARM_MPU_RBAR(2U, 0x20002000), .RASR = ARM_MPU_RASR_EX(1U, ARM_MPU_AP_FULL, ARM_MPU_ACCESS_NORMAL(ARM_MPU_CACHEP_NOCACHE, ARM_MPU_CACHEP_NOCACHE, 0U), 0x00U, ARM_MPU_REGION_SIZE_8KB) },
    { .RBAR = ARM_MPU_RBAR(3U, 0U), .RASR = 0U },
    { .RBAR = ARM_MPU_RBAR(4U, 0U), .RASR = 0U },
    { .RBAR = ARM_MPU_RBAR(5U, 0U), .RASR = 0U },
    { .RBAR = ARM_MPU_RBAR(6U, 0U), .RASR = 0U },
    { .RBAR = ARM_MPU_RBAR(7U, 0U), .RASR = 0U }
  },&lt;/LI-CODE&gt;&lt;P&gt;Regards Peter&lt;/P&gt;</description>
      <pubDate>Fri, 16 Jun 2023 07:52:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1670915#M24048</guid>
      <dc:creator>Peter-DK</dc:creator>
      <dc:date>2023-06-16T07:52:42Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 Fusa RTS &amp; MPU</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1671937#M24133</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/214124"&gt;@Peter-DK&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;I answered something similar here:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/S32-Design-Studio/FreeRTOS-MPU-for-S32K144/m-p/1065873" target="_blank"&gt;https://community.nxp.com/t5/S32-Design-Studio/FreeRTOS-MPU-for-S32K144/m-p/1065873&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;We have an example for this system MPU in the SDK:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;c:\NXP\S32DS.3.4\S32DS\software\S32SDK_S32K1XX_RTM_4.0.3\examples\S32K144\driver_examples\system\mpu_memory_protection\&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Second option is to write own code without SDK but unfortunately we do not have such example. But it’s only configuration of individual descriptors, so it should not be difficult. &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Lukas&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 19 Jun 2023 11:02:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1671937#M24133</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-06-19T11:02:27Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 Fusa RTS &amp; MPU</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1672395#M24168</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thank you for answering. I've looked at the example and I can't really understand it.&lt;/P&gt;&lt;P&gt;A bit more help, details and explanation would be appreciated.&lt;/P&gt;&lt;P&gt;Regards Peter&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jun 2023 06:06:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1672395#M24168</guid>
      <dc:creator>Peter-DK</dc:creator>
      <dc:date>2023-06-20T06:06:44Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 Fusa RTS &amp; MPU</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1672701#M24195</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/214124"&gt;@Peter-DK&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;simple example written in C will be better, I guess. Take a look at this one:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5674F-MPU-Initialization-CW210/ta-p/1126354" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5674F-MPU-Initialization-CW210/ta-p/1126354&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;It's for another device but the principle is still the same. See the main function and MPU_Init. It's just about configuration of start address, end address and user rights of individual descriptors. Then there's a test to check the behavior when the access rights are violated. And one note - all the memory resources need to be covered by MPU descriptors once the MPU is enabled. Access to an area which is not covered by descriptors is considered as access violation.&lt;/P&gt;
&lt;P&gt;I do not have this directly for S32K1 devices but I believe this will clear it up.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jun 2023 11:37:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Fusa-RTS-amp-MPU/m-p/1672701#M24195</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-06-20T11:37:11Z</dc:date>
    </item>
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