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    <title>topic Re: S32K116 comparator tolerance in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1672523#M24182</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Thanks&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001" target="_blank"&gt;@danielmartynek&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 20 Jun 2023 08:11:19 GMT</pubDate>
    <dc:creator>Sid_Zhou</dc:creator>
    <dc:date>2023-06-20T08:11:19Z</dc:date>
    <item>
      <title>S32K116 comparator tolerance</title>
      <link>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1667986#M23857</link>
      <description>&lt;P&gt;I am trying to calculate the worst-case tolerance of S32K116 comparator (use 1V bandgap).&lt;/P&gt;&lt;P&gt;I found that the input offset is 25mV in full temperature. and it would be 2.5% tolerance (25mV/1V). Together with the 3% tolerance on bandgap. There will be 5.5% tolerance on the comparator.&amp;nbsp;&lt;SPAN&gt;Since this tolerance looks a little too big for me, I am not sure if I got something wrong in this calculation.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Do I need to consider this input offset in a worst-case calculation? &lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;How much of this tolerance can be reduced if I have a calibration in room temperature?&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jun 2023 06:27:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1667986#M23857</guid>
      <dc:creator>Sid_Zhou</dc:creator>
      <dc:date>2023-06-13T06:27:24Z</dc:date>
    </item>
    <item>
      <title>Re: S32K116 comparator tolerance</title>
      <link>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1668379#M23898</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/159490"&gt;@Sid_Zhou&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;It is more complicated.&lt;/P&gt;
&lt;P&gt;The Vbg, which has its own tolerance, can be used as the reference for the internal DAC.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_2-1686656884152.png" style="width: 734px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/227413iDA952202BA3B9D33/image-dimensions/734x833?v=v2" width="734" height="833" role="button" title="danielmartynek_2-1686656884152.png" alt="danielmartynek_2-1686656884152.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;The DAC divides the Vin2 (Vreference voltage, Vbg).&lt;/P&gt;
&lt;P&gt;1 LSB = Vin2 / 256&lt;/P&gt;
&lt;P&gt;The DAC error is specified:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_1-1686656757272.png" style="width: 731px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/227412i0049BA192F2CCF5B/image-dimensions/731x53?v=v2" width="731" height="53" role="button" title="danielmartynek_1-1686656757272.png" alt="danielmartynek_1-1686656757272.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;VAIO is then the offset at the input of the CMP itself between INP and INN.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 14 Jun 2023 14:09:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1668379#M23898</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2023-06-14T14:09:22Z</dc:date>
    </item>
    <item>
      <title>Re: S32K116 comparator tolerance</title>
      <link>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1668750#M23912</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001"&gt;@danielmartynek&lt;/a&gt;&lt;/P&gt;&lt;P&gt;The DAC error is around 1LBS (1V/256=&lt;SPAN&gt;3.9 mV).&amp;nbsp;&lt;/SPAN&gt;it is small compare with the tolerances on Vbg(3%) and Vaio(25mV).&lt;/P&gt;&lt;P&gt;We have an application need to monitor a critical voltage Vtest&amp;nbsp;not drop below 0.8V. Assume we have this voltage connect to &lt;U&gt;INP&lt;/U&gt;.&lt;/P&gt;&lt;P&gt;1. With Vaio=-25mV Vaio, we need to set &lt;U&gt;INN&lt;/U&gt; to be 0.825V.&lt;/P&gt;&lt;P&gt;2. With Vbg=0.97V, we need to set VOSEL=218. (218*0.97/256=0.826V)&lt;/P&gt;&lt;P&gt;So VOSEL=218 is what I can make sure the MCU (any Batch, any temperature) trigger when Vtest&amp;lt;0.8V.&lt;/P&gt;&lt;P&gt;But with this setting, when worst case goes to opposite direction. (Vbg=1.03, Vaio=+25mV), The trigger voltage is now 0.90V (218*1.03V/256+25mV).&amp;nbsp;Thus, the worst case of Comparator is (0.8V,0.9V), which is a range around 12%.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Back to our real application, we need to monitor +3.3V not drop below 3.0V, it is only 9% change.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;The CMP seems not able to reach 100%-trigger (Vtest&amp;lt;3.0V) and 0%-not-trigger (Vtest&amp;gt;3.3V).&amp;nbsp;&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 14 Jun 2023 01:51:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1668750#M23912</guid>
      <dc:creator>Sid_Zhou</dc:creator>
      <dc:date>2023-06-14T01:51:26Z</dc:date>
    </item>
    <item>
      <title>Re: S32K116 comparator tolerance</title>
      <link>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1670302#M24022</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/159490"&gt;@Sid_Zhou&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;You could use the ADC to monitor the voltage periodically.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Thu, 15 Jun 2023 12:52:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1670302#M24022</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2023-06-15T12:52:52Z</dc:date>
    </item>
    <item>
      <title>Re: S32K116 comparator tolerance</title>
      <link>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1672523#M24182</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Thanks&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001" target="_blank"&gt;@danielmartynek&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 20 Jun 2023 08:11:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K116-comparator-tolerance/m-p/1672523#M24182</guid>
      <dc:creator>Sid_Zhou</dc:creator>
      <dc:date>2023-06-20T08:11:19Z</dc:date>
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