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    <title>S32KのトピックRe: CFSR (Configurable Fault Status Register)</title>
    <link>https://community.nxp.com/t5/S32K/CFSR-Configurable-Fault-Status-Register/m-p/1668122#M23873</link>
    <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/212442"&gt;@Shruthi_C&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Can you please find the fault instruction?&lt;/P&gt;
&lt;P&gt;Add this handler&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;void HardFault_Handler(void)
{
  while(1)
  {
  }
}&lt;/LI-CODE&gt;
&lt;P&gt;Once it is captured there, you should see the address of the fault instruction on the stack.&lt;/P&gt;
&lt;P&gt;You can refer to this document:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The example triggers this fault:&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;uint32_t read = *((uint32_t*)0x0007FFFA);
uint32_t read = *((uint32_t*)0x20000021);&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
    <pubDate>Tue, 13 Jun 2023 08:05:21 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2023-06-13T08:05:21Z</dc:date>
    <item>
      <title>CFSR (Configurable Fault Status Register)</title>
      <link>https://community.nxp.com/t5/S32K/CFSR-Configurable-Fault-Status-Register/m-p/1667507#M23833</link>
      <description>&lt;P&gt;HI,&lt;/P&gt;&lt;P&gt;I m getting CFSR register UNALIGNED error in S32K146 Microcontroller&lt;/P&gt;&lt;P&gt;Can someone please help me on this issue, which scenario we will get this hard fault error&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Shruthi_C_0-1686577897840.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/227153i9B65814A32478D41/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Shruthi_C_0-1686577897840.png" alt="Shruthi_C_0-1686577897840.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank You&lt;/P&gt;</description>
      <pubDate>Mon, 12 Jun 2023 13:53:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/CFSR-Configurable-Fault-Status-Register/m-p/1667507#M23833</guid>
      <dc:creator>Shruthi_C</dc:creator>
      <dc:date>2023-06-12T13:53:35Z</dc:date>
    </item>
    <item>
      <title>Re: CFSR (Configurable Fault Status Register)</title>
      <link>https://community.nxp.com/t5/S32K/CFSR-Configurable-Fault-Status-Register/m-p/1668122#M23873</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/212442"&gt;@Shruthi_C&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Can you please find the fault instruction?&lt;/P&gt;
&lt;P&gt;Add this handler&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;void HardFault_Handler(void)
{
  while(1)
  {
  }
}&lt;/LI-CODE&gt;
&lt;P&gt;Once it is captured there, you should see the address of the fault instruction on the stack.&lt;/P&gt;
&lt;P&gt;You can refer to this document:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The example triggers this fault:&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;uint32_t read = *((uint32_t*)0x0007FFFA);
uint32_t read = *((uint32_t*)0x20000021);&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jun 2023 08:05:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/CFSR-Configurable-Fault-Status-Register/m-p/1668122#M23873</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2023-06-13T08:05:21Z</dc:date>
    </item>
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