<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32Kのトピックs32k144 i2c test issue</title>
    <link>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661673#M23487</link>
    <description>&lt;P&gt;hello,&lt;/P&gt;&lt;P&gt;i tested with S32K144EVB board with i2c interface, and find i2c sck signal is so week&lt;/P&gt;&lt;P&gt;and also the i send 3 data, but seems only two data sent, and the data is not correct&lt;/P&gt;&lt;P&gt;i use the demo code, do some modify it, could you help to check it and attached is the source code.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="alice_thanks_0-1685609541229.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225807iAB4D474099BACE41/image-size/medium?v=v2&amp;amp;px=400" role="button" title="alice_thanks_0-1685609541229.png" alt="alice_thanks_0-1685609541229.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="alice_thanks_1-1685609694855.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225810i4D9F7FFF9C4A393C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="alice_thanks_1-1685609694855.png" alt="alice_thanks_1-1685609694855.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;DIV&gt;/* Definition of the data transfer size */&lt;/DIV&gt;&lt;DIV&gt;#define TRANSFER_SIZE (3u)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;/*!&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; \brief The main function for the project.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; \details The startup initialization sequence is the following:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - __start (startup asm routine)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - __init_hardware()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - main()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&amp;nbsp; &amp;nbsp;- PE_low_level_init()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&amp;nbsp; &amp;nbsp; &amp;nbsp;- Common_Init()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&amp;nbsp; &amp;nbsp; &amp;nbsp;- Peripherals_Init()&lt;/DIV&gt;&lt;DIV&gt;*/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void i2c_test()&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;int count = 0;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;int i;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint8_t buffer[TRANSFER_SIZE];&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if(count &amp;gt; 1000)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;count = 0;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if(count == 0)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Initialize the data buffer */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; buffer[i] = 0x55;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Send a packet of data to the bus slave */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; LPI2C_DRV_MasterSendDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Clear the buffer to prepare it for the next operation */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; buffer[i] = 0u;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Request data from the bus slave */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; LPI2C_DRV_MasterReceiveDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;count++;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;P&gt;int main(void)&lt;BR /&gt;{&lt;BR /&gt;/* Allocate memory for the LPI2C driver state structure */&lt;BR /&gt;lpi2c_master_state_t lpi2c1MasterState;&lt;/P&gt;&lt;P&gt;/* Declaration of the LPI2C transfer buffer */&lt;BR /&gt;uint8_t buffer[TRANSFER_SIZE];&lt;/P&gt;&lt;P&gt;/* Variable used for the loop that initializes the data buffer */&lt;BR /&gt;uint16_t i;&lt;/P&gt;&lt;P&gt;/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/&lt;BR /&gt;#ifdef PEX_RTOS_INIT&lt;BR /&gt;PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */&lt;BR /&gt;#endif&lt;BR /&gt;/*** End of Processor Expert internal initialization. ***/&lt;/P&gt;&lt;P&gt;/* Initialize and configure clocks&lt;BR /&gt;* - Configure system clocks and dividers&lt;BR /&gt;* - Configure LPI2C clock gating&lt;BR /&gt;* - see clock manager component for details&lt;BR /&gt;*/&lt;BR /&gt;CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT,&lt;BR /&gt;g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);&lt;BR /&gt;CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);&lt;/P&gt;&lt;P&gt;/* Initialize pins&lt;BR /&gt;* - Configure LPI2C pins&lt;BR /&gt;* - See PinSettings component for more info&lt;BR /&gt;*/&lt;BR /&gt;PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);&lt;/P&gt;&lt;P&gt;/* Initialize LPI2C Master configuration&lt;BR /&gt;* - Slave address 0x01&lt;BR /&gt;* - Fast operating mode, 400 KHz SCL frequency&lt;BR /&gt;* - See LPI2C components for configuration details&lt;BR /&gt;*/&lt;BR /&gt;LPI2C_DRV_MasterInit(INST_LPI2C1, &amp;amp;lpi2c1_MasterConfig0, &amp;amp;lpi2c1MasterState);&lt;BR /&gt;i2c_test();&lt;BR /&gt;while(1)&lt;BR /&gt;{&lt;BR /&gt;/* Initialize the data buffer */&lt;BR /&gt;for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;BR /&gt;{&lt;BR /&gt;buffer[i] = 0x55;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Send a packet of data to the bus slave */&lt;BR /&gt;LPI2C_DRV_MasterSendDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/P&gt;&lt;P&gt;/* Clear the buffer to prepare it for the next operation */&lt;BR /&gt;for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;BR /&gt;{&lt;BR /&gt;buffer[i] = 0u;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Request data from the bus slave */&lt;BR /&gt;LPI2C_DRV_MasterReceiveDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;BR /&gt;}&lt;BR /&gt;/* End of the driver example */&lt;/P&gt;&lt;P&gt;/*** Don't write any code pass this line, or it will be deleted during code generation. ***/&lt;BR /&gt;/*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/&lt;BR /&gt;#ifdef PEX_RTOS_START&lt;BR /&gt;PEX_RTOS_START(); /* Startup of the selected RTOS. Macro is defined by the RTOS component. */&lt;BR /&gt;#endif&lt;BR /&gt;/*** End of RTOS startup code. ***/&lt;BR /&gt;/*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/&lt;BR /&gt;for(;;) {&lt;BR /&gt;if(exit_code != 0) {&lt;BR /&gt;break;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;return exit_code;&lt;BR /&gt;/*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/&lt;BR /&gt;} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/&lt;/P&gt;&lt;/DIV&gt;</description>
    <pubDate>Thu, 01 Jun 2023 08:56:18 GMT</pubDate>
    <dc:creator>alice_th</dc:creator>
    <dc:date>2023-06-01T08:56:18Z</dc:date>
    <item>
      <title>s32k144 i2c test issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661673#M23487</link>
      <description>&lt;P&gt;hello,&lt;/P&gt;&lt;P&gt;i tested with S32K144EVB board with i2c interface, and find i2c sck signal is so week&lt;/P&gt;&lt;P&gt;and also the i send 3 data, but seems only two data sent, and the data is not correct&lt;/P&gt;&lt;P&gt;i use the demo code, do some modify it, could you help to check it and attached is the source code.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="alice_thanks_0-1685609541229.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225807iAB4D474099BACE41/image-size/medium?v=v2&amp;amp;px=400" role="button" title="alice_thanks_0-1685609541229.png" alt="alice_thanks_0-1685609541229.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="alice_thanks_1-1685609694855.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225810i4D9F7FFF9C4A393C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="alice_thanks_1-1685609694855.png" alt="alice_thanks_1-1685609694855.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;DIV&gt;/* Definition of the data transfer size */&lt;/DIV&gt;&lt;DIV&gt;#define TRANSFER_SIZE (3u)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;/*!&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; \brief The main function for the project.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; \details The startup initialization sequence is the following:&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - __start (startup asm routine)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - __init_hardware()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;* - main()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&amp;nbsp; &amp;nbsp;- PE_low_level_init()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&amp;nbsp; &amp;nbsp; &amp;nbsp;- Common_Init()&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;*&amp;nbsp; &amp;nbsp; &amp;nbsp;- Peripherals_Init()&lt;/DIV&gt;&lt;DIV&gt;*/&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void i2c_test()&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;int count = 0;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;int i;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint8_t buffer[TRANSFER_SIZE];&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if(count &amp;gt; 1000)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;count = 0;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if(count == 0)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Initialize the data buffer */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; buffer[i] = 0x55;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Send a packet of data to the bus slave */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; LPI2C_DRV_MasterSendDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Clear the buffer to prepare it for the next operation */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; buffer[i] = 0u;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; }&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Request data from the bus slave */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; LPI2C_DRV_MasterReceiveDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;count++;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;P&gt;int main(void)&lt;BR /&gt;{&lt;BR /&gt;/* Allocate memory for the LPI2C driver state structure */&lt;BR /&gt;lpi2c_master_state_t lpi2c1MasterState;&lt;/P&gt;&lt;P&gt;/* Declaration of the LPI2C transfer buffer */&lt;BR /&gt;uint8_t buffer[TRANSFER_SIZE];&lt;/P&gt;&lt;P&gt;/* Variable used for the loop that initializes the data buffer */&lt;BR /&gt;uint16_t i;&lt;/P&gt;&lt;P&gt;/*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/&lt;BR /&gt;#ifdef PEX_RTOS_INIT&lt;BR /&gt;PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */&lt;BR /&gt;#endif&lt;BR /&gt;/*** End of Processor Expert internal initialization. ***/&lt;/P&gt;&lt;P&gt;/* Initialize and configure clocks&lt;BR /&gt;* - Configure system clocks and dividers&lt;BR /&gt;* - Configure LPI2C clock gating&lt;BR /&gt;* - see clock manager component for details&lt;BR /&gt;*/&lt;BR /&gt;CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT,&lt;BR /&gt;g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);&lt;BR /&gt;CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);&lt;/P&gt;&lt;P&gt;/* Initialize pins&lt;BR /&gt;* - Configure LPI2C pins&lt;BR /&gt;* - See PinSettings component for more info&lt;BR /&gt;*/&lt;BR /&gt;PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);&lt;/P&gt;&lt;P&gt;/* Initialize LPI2C Master configuration&lt;BR /&gt;* - Slave address 0x01&lt;BR /&gt;* - Fast operating mode, 400 KHz SCL frequency&lt;BR /&gt;* - See LPI2C components for configuration details&lt;BR /&gt;*/&lt;BR /&gt;LPI2C_DRV_MasterInit(INST_LPI2C1, &amp;amp;lpi2c1_MasterConfig0, &amp;amp;lpi2c1MasterState);&lt;BR /&gt;i2c_test();&lt;BR /&gt;while(1)&lt;BR /&gt;{&lt;BR /&gt;/* Initialize the data buffer */&lt;BR /&gt;for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;BR /&gt;{&lt;BR /&gt;buffer[i] = 0x55;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Send a packet of data to the bus slave */&lt;BR /&gt;LPI2C_DRV_MasterSendDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/P&gt;&lt;P&gt;/* Clear the buffer to prepare it for the next operation */&lt;BR /&gt;for (i = 0u; i &amp;lt; TRANSFER_SIZE; i++)&lt;BR /&gt;{&lt;BR /&gt;buffer[i] = 0u;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Request data from the bus slave */&lt;BR /&gt;LPI2C_DRV_MasterReceiveDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;BR /&gt;}&lt;BR /&gt;/* End of the driver example */&lt;/P&gt;&lt;P&gt;/*** Don't write any code pass this line, or it will be deleted during code generation. ***/&lt;BR /&gt;/*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/&lt;BR /&gt;#ifdef PEX_RTOS_START&lt;BR /&gt;PEX_RTOS_START(); /* Startup of the selected RTOS. Macro is defined by the RTOS component. */&lt;BR /&gt;#endif&lt;BR /&gt;/*** End of RTOS startup code. ***/&lt;BR /&gt;/*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/&lt;BR /&gt;for(;;) {&lt;BR /&gt;if(exit_code != 0) {&lt;BR /&gt;break;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;return exit_code;&lt;BR /&gt;/*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/&lt;BR /&gt;} /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/&lt;/P&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 01 Jun 2023 08:56:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661673#M23487</guid>
      <dc:creator>alice_th</dc:creator>
      <dc:date>2023-06-01T08:56:18Z</dc:date>
    </item>
    <item>
      <title>Re: s32k144 i2c test issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661858#M23503</link>
      <description>&lt;P&gt;Hello Alice,&lt;/P&gt;
&lt;P&gt;In general, the strength of the signal depends on the external pull-up resistor, Cload on the bus, and the type of pads used (GPIO or GPIO-HD (PCR[DSE] = 1) if configurable).&lt;/P&gt;
&lt;P&gt;But in this case, it looks like an error of measurement, I don't see the GND level on the osciloscope.&lt;/P&gt;
&lt;P&gt;Also, from the image, it is not clear whether the transfer was acknowledged by the slave device or not, can you zoom in on the ACK bit?&lt;/P&gt;
&lt;P&gt;What status code the LPI2C_DRV_MasterSendDataBlocking() returns?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you,&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 11:47:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661858#M23503</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2023-06-01T11:47:12Z</dc:date>
    </item>
    <item>
      <title>Re: s32k144 i2c test issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661872#M23506</link>
      <description>&lt;P&gt;the&amp;nbsp;&lt;SPAN&gt;GND is connect with the osciloscope, i can capture spi waveform is good with the same GND.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;the I2C not connect any slave, i&amp;nbsp;just measure the waveform with osciloscope.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;does the waveform is correct ?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 12:00:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661872#M23506</guid>
      <dc:creator>alice_th</dc:creator>
      <dc:date>2023-06-01T12:00:10Z</dc:date>
    </item>
    <item>
      <title>Re: s32k144 i2c test issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661885#M23509</link>
      <description>&lt;P&gt;There must be a slave device on the bus, and the master must address the slave.&lt;/P&gt;
&lt;P&gt;Otherwise the master will just send an address that will not get acknowledged, and the transfer will be terminated on NACK.&lt;/P&gt;
&lt;P&gt;So, in the image you posted, the master is trying to address the slave twice.&lt;/P&gt;
&lt;P&gt;Once in each of the transfer functions you have in the i2c_test() function:&lt;/P&gt;
&lt;P&gt;LPI2C_DRV_MasterSendDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/P&gt;
&lt;P&gt;LPI2C_DRV_MasterReceiveDataBlocking(INST_LPI2C1, buffer, TRANSFER_SIZE, true, OSIF_WAIT_FOREVER);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please refer to UM10204 I2C-bus specification and user manual&lt;/P&gt;
&lt;P&gt;&lt;A href="https://assets.nexperia.com/documents/user-manual/UM10204.pdf" target="_blank" rel="noopener"&gt;https://assets.nexperia.com/documents/user-manual/UM10204.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 12:29:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661885#M23509</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2023-06-01T12:29:37Z</dc:date>
    </item>
    <item>
      <title>Re: s32k144 i2c test issue</title>
      <link>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661910#M23510</link>
      <description>&lt;P&gt;ok, thanks!&lt;/P&gt;&lt;P&gt;seems only write read the address to the bus as no slave device, no data send, i will tested with slave device if still have problem will come back, thank you!&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jun 2023 13:09:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/s32k144-i2c-test-issue/m-p/1661910#M23510</guid>
      <dc:creator>alice_th</dc:creator>
      <dc:date>2023-06-01T13:09:19Z</dc:date>
    </item>
  </channel>
</rss>

