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    <title>S32KのトピックRe: [SM_070] SW register test within FTTI</title>
    <link>https://community.nxp.com/t5/S32K/SM-070-SW-register-test-within-FTTI/m-p/1650609#M22935</link>
    <description>&lt;P&gt;Hello Catosh,&lt;/P&gt;&lt;P&gt;Do you mind sharing the implementation of the CRC check for the registers?&lt;/P&gt;</description>
    <pubDate>Mon, 15 May 2023 23:46:53 GMT</pubDate>
    <dc:creator>Kive</dc:creator>
    <dc:date>2023-05-15T23:46:53Z</dc:date>
    <item>
      <title>[SM_070] SW register test within FTTI</title>
      <link>https://community.nxp.com/t5/S32K/SM-070-SW-register-test-within-FTTI/m-p/909199#M4687</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I need a clarification about SM_070 in SM rev.4 :&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;[SM_070] The safety-relevant configuration registers shall be checked at least once per FTTI to verify their proper content.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;and&amp;nbsp; the related reccomendation:&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;Using application software, periodically check the contents of configuration registers (more than 10 registers) of modules attached to the PBRIDGEs to help detect faults in the PBRIDGE.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;the implementation hint states that&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;The following safety integrity functions for register configuration checks are recommended in this document. Depending on the application, you can choose to check them differently or can consider other peripherals as per safety&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;and the modules are Flextimer(s), port(s), adc, pdb and lpit.&amp;nbsp;&lt;/P&gt;&lt;P&gt;In the attached HW_Safety_Measure_reactionTime I can see that also SCG SW register is expected to be check.&amp;nbsp;&lt;/P&gt;&lt;P&gt;My question(s) is(are):&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;is sufficient to check the registers of the recommended modules + SCG&amp;nbsp;from the iso26262 perspective or NXP in the FMEDA evaluation expects ALL registers to be checked?&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;The reccomendation about PBRIDGE&amp;nbsp;requires to check periodically the configuration of the registers in AIPS-lite OR to perform [SM_070] on ALL peripherals (if safety relevant, obviously)?&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;K.R.&lt;/P&gt;&lt;P&gt;Luca&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Jul 2019 08:40:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SM-070-SW-register-test-within-FTTI/m-p/909199#M4687</guid>
      <dc:creator>Catosh</dc:creator>
      <dc:date>2019-07-26T08:40:49Z</dc:date>
    </item>
    <item>
      <title>Re: [SM_070] SW register test within FTTI</title>
      <link>https://community.nxp.com/t5/S32K/SM-070-SW-register-test-within-FTTI/m-p/1650609#M22935</link>
      <description>&lt;P&gt;Hello Catosh,&lt;/P&gt;&lt;P&gt;Do you mind sharing the implementation of the CRC check for the registers?&lt;/P&gt;</description>
      <pubDate>Mon, 15 May 2023 23:46:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SM-070-SW-register-test-within-FTTI/m-p/1650609#M22935</guid>
      <dc:creator>Kive</dc:creator>
      <dc:date>2023-05-15T23:46:53Z</dc:date>
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