<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Linker definition file clarification in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1633617#M22105</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are using a platform which has S32K314 controller. The datasheet of this part says that this has 512KB of total RAM. But the following is the linker definition file that i am using. What i see is, i am not able to allocate more than 185 KB of memory in my code (Both BSS and Datasegment combined). Can someone help me on how to utilize the full 512KB of memory in this system ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The following is my linker description contents.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;MEMORY&lt;BR /&gt;{&lt;BR /&gt;int_flash : ORIGIN = 0x00400000, LENGTH = 0x003D4000 /* 4096K - 176K (sBAF + HSE)*/&lt;BR /&gt;int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00008000 /* 32K */&lt;BR /&gt;int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* 64K */&lt;BR /&gt;int_sram : ORIGIN = 0x20400000, LENGTH = 0x0002DF00 /* 183.9K */&lt;BR /&gt;int_sram_fls_rsv : ORIGIN = 0x2042DF00, LENGTH = 0x00000100 /* 0.1K */&lt;BR /&gt;int_sram_stack_c0 : ORIGIN = 0x2042E000, LENGTH = 0x00001000 /* 4KB */&lt;BR /&gt;int_sram_stack_c1 : ORIGIN = 0x2042F000, LENGTH = 0x00001000 /* 4KB */&lt;BR /&gt;int_sram_no_cacheable : ORIGIN = 0x20430000, LENGTH = 0x0000FF00 /* 64KB, needs to include int_results */&lt;BR /&gt;int_sram_results : ORIGIN = 0x2043FF00, LENGTH = 0x00000100&lt;BR /&gt;int_sram_shareable : ORIGIN = 0x20440000, LENGTH = 0x00004000 /* 16KB */&lt;BR /&gt;ram_rsvd2 : ORIGIN = 0x20444000, LENGTH = 0 /* End of SRAM */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards, Biju&lt;/P&gt;</description>
    <pubDate>Fri, 14 Apr 2023 05:45:30 GMT</pubDate>
    <dc:creator>biju_nair</dc:creator>
    <dc:date>2023-04-14T05:45:30Z</dc:date>
    <item>
      <title>Linker definition file clarification</title>
      <link>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1633617#M22105</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are using a platform which has S32K314 controller. The datasheet of this part says that this has 512KB of total RAM. But the following is the linker definition file that i am using. What i see is, i am not able to allocate more than 185 KB of memory in my code (Both BSS and Datasegment combined). Can someone help me on how to utilize the full 512KB of memory in this system ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The following is my linker description contents.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;MEMORY&lt;BR /&gt;{&lt;BR /&gt;int_flash : ORIGIN = 0x00400000, LENGTH = 0x003D4000 /* 4096K - 176K (sBAF + HSE)*/&lt;BR /&gt;int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00008000 /* 32K */&lt;BR /&gt;int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* 64K */&lt;BR /&gt;int_sram : ORIGIN = 0x20400000, LENGTH = 0x0002DF00 /* 183.9K */&lt;BR /&gt;int_sram_fls_rsv : ORIGIN = 0x2042DF00, LENGTH = 0x00000100 /* 0.1K */&lt;BR /&gt;int_sram_stack_c0 : ORIGIN = 0x2042E000, LENGTH = 0x00001000 /* 4KB */&lt;BR /&gt;int_sram_stack_c1 : ORIGIN = 0x2042F000, LENGTH = 0x00001000 /* 4KB */&lt;BR /&gt;int_sram_no_cacheable : ORIGIN = 0x20430000, LENGTH = 0x0000FF00 /* 64KB, needs to include int_results */&lt;BR /&gt;int_sram_results : ORIGIN = 0x2043FF00, LENGTH = 0x00000100&lt;BR /&gt;int_sram_shareable : ORIGIN = 0x20440000, LENGTH = 0x00004000 /* 16KB */&lt;BR /&gt;ram_rsvd2 : ORIGIN = 0x20444000, LENGTH = 0 /* End of SRAM */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards, Biju&lt;/P&gt;</description>
      <pubDate>Fri, 14 Apr 2023 05:45:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1633617#M22105</guid>
      <dc:creator>biju_nair</dc:creator>
      <dc:date>2023-04-14T05:45:30Z</dc:date>
    </item>
    <item>
      <title>Re: Linker definition file clarification</title>
      <link>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1633790#M22130</link>
      <description>&lt;P&gt;Hi Biju,&lt;/P&gt;
&lt;P&gt;As you can see in the memory map (attached to the RM), there is&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;direct access to ITCM_0 (32KB) + DTCM_0 (64KB) + SRAM0 (160KB) + SRAM1 (160KB) = 416KB,&lt;/LI&gt;
&lt;LI&gt;backdoor access to ITCM_1 (32KB) + DTCM_1 (64KB) = 96KB&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;You can extend or add regions in the linker file based on the addresses below.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1681464638072.png" style="width: 683px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/219273iF4A41BA563732413/image-dimensions/683x867?v=v2" width="683" height="867" role="button" title="danielmartynek_0-1681464638072.png" alt="danielmartynek_0-1681464638072.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 14 Apr 2023 09:35:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1633790#M22130</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2023-04-14T09:35:46Z</dc:date>
    </item>
    <item>
      <title>Re: Linker definition file clarification</title>
      <link>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1663880#M23643</link>
      <description>&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;As S32K314 does not have a second core, can i still access DTCM_1 via backdoor ? What i meant is, even without the second core, will i still be able to utilize the DTCM_1 memory ? If so, what linker script change do i need and how can i allocate variables into that ? For DTCM_0, i use the following attribute to access it.&lt;/P&gt;&lt;P&gt;__attribute__ ((section(".dtcm0_data")))&lt;/P&gt;&lt;P&gt;Regards, Biju&lt;/P&gt;</description>
      <pubDate>Tue, 06 Jun 2023 04:22:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Linker-definition-file-clarification/m-p/1663880#M23643</guid>
      <dc:creator>biju_nair</dc:creator>
      <dc:date>2023-06-06T04:22:31Z</dc:date>
    </item>
  </channel>
</rss>

