void SOSC_init_8MHz(void)

SivakumarMariappan — Mon, 03 Apr 2023 14:38:52 GMT

We have used S32 Configuration Tool to configure Osillator module. Here is the generated C code for your ready reference. /* ************************************************************************* * Configuration structure for Clock Configuration 0 * ************************************************************************* */ /*! @brief User Configuration structure clock_managerCfg_0 */ clock_manager_user_config_t clockMan1_InitConfig0 = { .scgConfig = { .sircConfig = { .initialize = true, .enableInStop = true, /* Enable SIRC in stop mode */ .enableInLowPower = true, /* Enable SIRC in low power mode */ .locked = false, /* unlocked */ .range = SCG_SIRC_RANGE_HIGH, /* Slow IRC high range clock (8 MHz) */ .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* Slow IRC Clock Divider 1: divided by 1 */ .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* Slow IRC Clock Divider 3: divided by 1 */ }, .fircConfig = { .initialize = true, .regulator = true, /* FIRC regulator is enabled */ .locked = false, /* unlocked */ .range = SCG_FIRC_RANGE_48M, /*!< RANGE */ .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* Fast IRC Clock Divider 1: divided by 1 */ .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* Fast IRC Clock Divider 3: divided by 1 */ }, .rtcConfig = { .initialize = false, }, .soscConfig = { .initialize = true, .freq = 8000000U, /* System Oscillator frequency: 8000000Hz */ .monitorMode = SCG_SOSC_MONITOR_DISABLE,/* Monitor disabled */ .locked = false, /* SOSC disabled */ .extRef = SCG_SOSC_REF_OSC, /* Internal oscillator of OSC requested. */ .gain = SCG_SOSC_GAIN_LOW, /* Configure crystal oscillator for low-gain operation */ .range = SCG_SOSC_RANGE_HIGH, /* High frequency range selected for the crystal oscillator of 8 MHz to 40 MHz. */ .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* System OSC Clock Divider 1: divided by 1 */ .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* System OSC Clock Divider 3: divided by 1 */ }, .spllConfig = { .initialize = true, .monitorMode = SCG_SPLL_MONITOR_DISABLE,/* Monitor disabled */ .locked = false, /* unlocked */ .prediv = (uint8_t)SCG_SPLL_CLOCK_PREDIV_BY_1,/* Divided by 1 */ .mult = (uint8_t)SCG_SPLL_CLOCK_MULTIPLY_BY_28,/* Multiply Factor is 28 */ .src=0U, .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* System PLL Clock Divider 1: divided by 1 */ .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* System PLL Clock Divider 3: divided by 1 */ }, .clockOutConfig = { .initialize = true, .source = SCG_CLOCKOUT_SRC_FIRC, /* Fast IRC. */ }, .clockModeConfig = { .initialize = true, .rccrConfig = { .src=SCG_SYSTEM_CLOCK_SRC_FIRC,/* Fast FIRC */ .divCore = SCG_SYSTEM_CLOCK_DIV_BY_1,/* Core Clock Divider: divided by 1 */ .divBus = SCG_SYSTEM_CLOCK_DIV_BY_1,/* Bus Clock Divider: divided by 1 */ .divSlow = SCG_SYSTEM_CLOCK_DIV_BY_2,/* Slow Clock Divider: divided by 2 */ }, .vccrConfig = { .src=SCG_SYSTEM_CLOCK_SRC_SIRC,/* Slow SIRC */ .divCore = SCG_SYSTEM_CLOCK_DIV_BY_2,/* Core Clock Divider: divided by 2 */ .divBus = SCG_SYSTEM_CLOCK_DIV_BY_1,/* Bus Clock Divider: divided by 1 */ .divSlow = SCG_SYSTEM_CLOCK_DIV_BY_4,/* Slow Clock Divider: divided by 4 */ }, .hccrConfig = { .src=SCG_SYSTEM_CLOCK_SRC_SYS_PLL,/* System PLL */ .divCore = SCG_SYSTEM_CLOCK_DIV_BY_1,/* Core Clock Divider: divided by 1 */ .divBus = SCG_SYSTEM_CLOCK_DIV_BY_2,/* Bus Clock Divider: divided by 2 */ .divSlow = SCG_SYSTEM_CLOCK_DIV_BY_4,/* Slow Clock Divider: divided by 4 */ }, }, }, .pccConfig = { .peripheralClocks = peripheralClockConfig0, /*!< Peripheral clock control configurations */ .count = NUM_OF_PERIPHERAL_CLOCKS_0, /*!< Number of the peripheral clock control configurations */ }, .simConfig = { .clockOutConfig = { .initialize = true, /*!< Initialize */ .enable = true, /* enabled */ .source = SIM_CLKOUT_SEL_SYSTEM_SCG_CLKOUT,/* SCG CLKOUT clock select: SCG slow clock */ .divider = SIM_CLKOUT_DIV_BY_1, /* Divided by 1 */ }, .lpoClockConfig = { .initialize = true, /*!< Initialize */ .enableLpo1k = true, /*!< LPO1KCLKEN */ .enableLpo32k = true, /*!< LPO32KCLKEN */ .sourceLpoClk = SIM_LPO_CLK_SEL_LPO_128K,/* 128 kHz LPO clock */ .sourceRtcClk = SIM_RTCCLK_SEL_FIRCDIV1_CLK,/* FIRCDIV1 clock */ }, .platGateConfig = { .initialize = true, /*!< Initialize */ .enableEim = false, /*!< CGCEIM */ .enableErm = true, /*!< CGCERM */ .enableDma = false, /*!< CGCDMA */ .enableMpu = true, /*!< CGCMPU */ .enableMscm = false, /*!< CGCMSCM */ }, .tclkConfig = { .initialize = false, /*!< Initialize */ }, .traceClockConfig = { .initialize = true, /*!< Initialize */ .divEnable = true, /*!< TRACEDIVEN */ .source = CLOCK_TRACE_SRC_CORE_CLK, /*!< TRACECLK_SEL */ .divider = 0U, /*!< TRACEDIV */ .divFraction = false, /*!< TRACEFRAC */ }, }, .pmcConfig = { .lpoClockConfig = { .initialize = true, /*!< Initialize */ .enable = true, /*!< Enable/disable LPO */ .trimValue = 0, /*!< Trimming value for LPO */ }, }, };

/*! @brief Array of pointers to User configuration structures */ clock_manager_user_config_t const * g_clockManConfigsArr[] = { &clockMan1_InitConfig0 };

/*! @brief Array of pointers to User defined Callbacks configuration structures */ /* The tool do not support generate Callbacks configuration. It's always empty. */ clock_manager_callback_user_config_t * g_clockManCallbacksArr[] = {(void*)0};

We would like to use this structure and complete the "SOSC_init_8MHz" function. Could you please help me out to access the individual elements from this structure please? Please help us out to replace the following traditional way using this structure and pointers .

SCG->SOSCDIV=0x00000101; /* SOSCDIV1 & SOSCDIV2 =1: divide by 1 */

topic void SOSC_init_8MHz(void) in S32K

void SOSC_init_8MHz(void)