https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621263#M21580 <P>How to use the GPIO mode of emios to output high or low levels of the PTA24 pin on the S32K312 chip</P> Fri, 24 Mar 2023 01:36:12 GMT WeiC 2023-03-24T01:36:12Z https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621263#M21580 <P>How to use the GPIO mode of emios to output high or low levels of the PTA24 pin on the S32K312 chip</P> Fri, 24 Mar 2023 01:36:12 GMT https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621263#M21580 WeiC 2023-03-24T01:36:12Z https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621488#M21590 <P><A href="mailto:Hi@wc" target="_blank">Hi@wc</A></P> <P>you can take a look at the function:</P> <LI-CODE lang="c">/*FUNCTION********************************************************************** * * Function Name : Emios_Pwm_Ip_SetOutputState * Description : Set the state of output pin * * *END**************************************************************************/ void Emios_Pwm_Ip_SetOutputState(uint8 Instance, uint8 Channel, Emios_Pwm_Ip_OutputStateType OutputState) { #if (EMIOS_PWM_IP_DEV_ERROR_DETECT == STD_ON) DevAssert(EMIOS_PWM_IP_INSTANCE_COUNT &gt; Instance); DevAssert(EMIOS_PWM_IP_CHANNEL_COUNT &gt; Channel); #endif Emios_Pwm_Ip_HwAddrType *const Base = Emios_Pwm_Ip_aBasePtr[Instance]; SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_24(); /* Set output pin polarity */ if (EMIOS_PWM_IP_OUTPUT_STATE_LOW == OutputState) { Emios_Pwm_Ip_SetEdgePolarity(Base, Channel, (Emios_Pwm_Ip_PolarityType)EMIOS_PWM_IP_ACTIVE_LOW); } else { Emios_Pwm_Ip_SetEdgePolarity(Base, Channel, (Emios_Pwm_Ip_PolarityType)EMIOS_PWM_IP_ACTIVE_HIGH); } /* Enter GPIO output Mode */ Emios_Pwm_Ip_SetPwmMode(Base, Channel, (Emios_Pwm_Ip_PwmModeType)EMIOS_PWM_IP_MODE_GPO); /* Stored the current Mode */ Emios_Pwm_Ip_aCurrentModes[Instance][Channel] = (Emios_Pwm_Ip_PwmModeType)EMIOS_PWM_IP_MODE_GPO; /* Disable Channel interrupts */ Emios_Pwm_Ip_SetInterruptRequest(Base, Channel, FALSE); /* Clear pending interrupt flag for the Channel */ Emios_Pwm_Ip_ClearFlagEvent(Base, Channel); /* Confirm the Channel is idle state */ Emios_Pwm_Ip_aCheckState[Instance][Channel] = (uint8)2U; SchM_Exit_Pwm_PWM_EXCLUSIVE_AREA_24(); } </LI-CODE> <P>for example:</P> <LI-CODE lang="c">Emios_Pwm_Ip_SetOutputState(INSTANCE_1,7,EMIOS_PWM_IP_OUTPUT_STATE_LOW); TestDelay(0x1fff); Emios_Pwm_Ip_SetOutputState(INSTANCE_1,7,EMIOS_PWM_IP_OUTPUT_STATE_HIGH); TestDelay(0x1fff);</LI-CODE> <P>&nbsp;</P> <P>&nbsp;</P> Fri, 24 Mar 2023 07:44:43 GMT https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621488#M21590 Senlent 2023-03-24T07:44:43Z https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621516#M21591 <P><SPAN>Thank you very much</SPAN>!</P> Fri, 24 Mar 2023 08:36:14 GMT https://community.nxp.com/t5/S32K/emios-in-GPIO-output-mode/m-p/1621516#M21591 WeiC 2023-03-24T08:36:14Z