https://community.nxp.com/t5/S32K/S32K3-ADC-Filter-Capacitance-Selection-Range/m-p/1615713#M21397 <P>Hi,</P> <P>&nbsp;</P> <P>On S32K3 Data Sheet, Figure 33 [SAR ADC Input Circuit].</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SAR ADC Input Circuit.jpg" style="width: 882px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/214708iDBFBD8C091738FE7/image-size/large?v=v2&amp;px=999" role="button" title="SAR ADC Input Circuit.jpg" alt="SAR ADC Input Circuit.jpg" /></span></P> <P>Could you please clarify the Filter Capacitance (CF) selection range. Is there any formula for this value?</P> <P>Ps: S32K312 MCU Clock: 120 MHz, ADC clock speed: 80 MHz</P> <P>&nbsp;</P> <P>BR,</P> <P>Hornby</P> Wed, 15 Mar 2023 12:34:23 GMT hongpingxu-b364 2023-03-15T12:34:23Z https://community.nxp.com/t5/S32K/S32K3-ADC-Filter-Capacitance-Selection-Range/m-p/1615713#M21397 <P>Hi,</P> <P>&nbsp;</P> <P>On S32K3 Data Sheet, Figure 33 [SAR ADC Input Circuit].</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SAR ADC Input Circuit.jpg" style="width: 882px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/214708iDBFBD8C091738FE7/image-size/large?v=v2&amp;px=999" role="button" title="SAR ADC Input Circuit.jpg" alt="SAR ADC Input Circuit.jpg" /></span></P> <P>Could you please clarify the Filter Capacitance (CF) selection range. Is there any formula for this value?</P> <P>Ps: S32K312 MCU Clock: 120 MHz, ADC clock speed: 80 MHz</P> <P>&nbsp;</P> <P>BR,</P> <P>Hornby</P> Wed, 15 Mar 2023 12:34:23 GMT https://community.nxp.com/t5/S32K/S32K3-ADC-Filter-Capacitance-Selection-Range/m-p/1615713#M21397 hongpingxu-b364 2023-03-15T12:34:23Z https://community.nxp.com/t5/S32K/S32K3-ADC-Filter-Capacitance-Selection-Range/m-p/1616028#M21406 <P>Hi,</P> <P>The C_F is related to the RC filter (or low pass filter) intended for the ADC input to have, in order to&nbsp;reduce the noise that will input the ADC pin.</P> <P>The selection of both R_F and C_F is mainly related to the cut-off frequency that it is needed to reduce unwanted noise on the ADC input. The formula can be the one shown below:</P> <P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="DanielAguirre_0-1678904130217.png" style="width: 106px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/214781i30BDAD3E87E70E42/image-dimensions/106x46?v=v2" width="106" height="46" role="button" title="DanielAguirre_0-1678904130217.png" alt="DanielAguirre_0-1678904130217.png" /></span></P> <P>Please, let us know if this information was helpful or not.</P> Wed, 15 Mar 2023 18:16:41 GMT https://community.nxp.com/t5/S32K/S32K3-ADC-Filter-Capacitance-Selection-Range/m-p/1616028#M21406 Daniel-Aguirre 2023-03-15T18:16:41Z