https://community.nxp.com/t5/S32K/Ethernet-in-MII-mode/m-p/1614035#M21315 <P>Hi,</P> <P>yes, S32K148 support MII mode.<BR />On MCU side, the ENET module have to be set for MII mode and all needed pins properly initialized.<BR />Thy PHY must be set for MII mode as well, either using bootstrapping options or later by updating PHY registers using SMI interface.<BR /><SPAN>TX_CLK/RX_CLK are inputs on MCU side, a PHY is generating those clock&nbsp;</SPAN>signals.</P> <P>BR, Petr&nbsp;</P> Mon, 13 Mar 2023 11:50:55 GMT PetrS 2023-03-13T11:50:55Z https://community.nxp.com/t5/S32K/Ethernet-in-MII-mode/m-p/1613448#M21295 <P>Hi,</P><P>I'm using S32K148 Microcontroller, will it support MII mode with PHY?</P><P>What are settings needs to be done to work in MII&nbsp;mode?</P><P>Should TX_CLK and RX_CLK configured for 2.5MHz/25MHz?</P> Sat, 11 Mar 2023 15:53:23 GMT https://community.nxp.com/t5/S32K/Ethernet-in-MII-mode/m-p/1613448#M21295 rak14 2023-03-11T15:53:23Z https://community.nxp.com/t5/S32K/Ethernet-in-MII-mode/m-p/1614035#M21315 <P>Hi,</P> <P>yes, S32K148 support MII mode.<BR />On MCU side, the ENET module have to be set for MII mode and all needed pins properly initialized.<BR />Thy PHY must be set for MII mode as well, either using bootstrapping options or later by updating PHY registers using SMI interface.<BR /><SPAN>TX_CLK/RX_CLK are inputs on MCU side, a PHY is generating those clock&nbsp;</SPAN>signals.</P> <P>BR, Petr&nbsp;</P> Mon, 13 Mar 2023 11:50:55 GMT https://community.nxp.com/t5/S32K/Ethernet-in-MII-mode/m-p/1614035#M21315 PetrS 2023-03-13T11:50:55Z