<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic S32k146 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32k146/m-p/1612948#M21280</link>
    <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Is there any specific interrupt for AWIC or is it just enable the clock and NVIC will process all pending interrupts.&lt;/P&gt;</description>
    <pubDate>Fri, 10 Mar 2023 07:31:00 GMT</pubDate>
    <dc:creator>SreejithN</dc:creator>
    <dc:date>2023-03-10T07:31:00Z</dc:date>
    <item>
      <title>S32k146</title>
      <link>https://community.nxp.com/t5/S32K/S32k146/m-p/1612948#M21280</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Is there any specific interrupt for AWIC or is it just enable the clock and NVIC will process all pending interrupts.&lt;/P&gt;</description>
      <pubDate>Fri, 10 Mar 2023 07:31:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k146/m-p/1612948#M21280</guid>
      <dc:creator>SreejithN</dc:creator>
      <dc:date>2023-03-10T07:31:00Z</dc:date>
    </item>
    <item>
      <title>Re: S32k146</title>
      <link>https://community.nxp.com/t5/S32K/S32k146/m-p/1613624#M21299</link>
      <description>&lt;P&gt;Hi&amp;nbsp;SreejithN,&lt;/P&gt;
&lt;P&gt;No.&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;After clock restart, the NVIC observes the pending interrupt and performs the normal interrupt or event processing.&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Table 2-3. Core modules.png" style="width: 875px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/214182i4BD489359054D41F/image-size/large?v=v2&amp;amp;px=999" role="button" title="Table 2-3. Core modules.png" alt="Table 2-3. Core modules.png" /&gt;&lt;/span&gt;&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Figure 58-1. Cortex-M4 debug topology.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/214186i766217F7D03EAF76/image-size/large?v=v2&amp;amp;px=999" role="button" title="Figure 58-1. Cortex-M4 debug topology.png" alt="Figure 58-1. Cortex-M4 debug topology.png" /&gt;&lt;/span&gt;&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Robin&lt;BR /&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Mon, 13 Mar 2023 03:02:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k146/m-p/1613624#M21299</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2023-03-13T03:02:52Z</dc:date>
    </item>
  </channel>
</rss>

