<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Oscillator and SPLL guidelines S32K144 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742543#M2010</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I've a question regarding the topic.&lt;/P&gt;&lt;P&gt;Since I'm using 8 MHz externl crystal, I've configured the SCG_SOSCCFG[RANGE] = 10 (Medium frequency range selected for the crystal oscillator of 4 MHz to 8 MHz) even if the SPLL is selected as reference clock (SCG_RCCR[SCS] = 6 System PLL).&lt;/P&gt;&lt;P&gt;Every seems to work correctly.&lt;/P&gt;&lt;P&gt;What are the possible side-effect?&lt;/P&gt;&lt;P&gt;Is it a wrong configuration for RM 28.1.2?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Carmelo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 10 Apr 2020 08:21:59 GMT</pubDate>
    <dc:creator>carmelo_salva</dc:creator>
    <dc:date>2020-04-10T08:21:59Z</dc:date>
    <item>
      <title>Oscillator and SPLL guidelines S32K144</title>
      <link>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742541#M2008</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have been going through&amp;nbsp; the RM to understand and read about clocks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But one thing i don't get is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/11878i4420CD3C6381FDFC/image-size/large?v=v2&amp;amp;px=999" title="OSC_SPLL_GL.jpg" alt="OSC_SPLL_GL.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I can't see any of this applied in the examples using SOSC and SPLL (clocks_and_modes.c)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When does this apply? Is it not important?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Mar 2018 19:38:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742541#M2008</guid>
      <dc:creator>christofferjärl</dc:creator>
      <dc:date>2018-03-08T19:38:54Z</dc:date>
    </item>
    <item>
      <title>Re: Oscillator and SPLL guidelines S32K144</title>
      <link>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742542#M2009</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Chris,&lt;BR /&gt;Please follow the reference manual.&lt;BR /&gt;The examples are rather simple.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Mar 2018 10:54:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742542#M2009</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2018-03-12T10:54:01Z</dc:date>
    </item>
    <item>
      <title>Re: Oscillator and SPLL guidelines S32K144</title>
      <link>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742543#M2010</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I've a question regarding the topic.&lt;/P&gt;&lt;P&gt;Since I'm using 8 MHz externl crystal, I've configured the SCG_SOSCCFG[RANGE] = 10 (Medium frequency range selected for the crystal oscillator of 4 MHz to 8 MHz) even if the SPLL is selected as reference clock (SCG_RCCR[SCS] = 6 System PLL).&lt;/P&gt;&lt;P&gt;Every seems to work correctly.&lt;/P&gt;&lt;P&gt;What are the possible side-effect?&lt;/P&gt;&lt;P&gt;Is it a wrong configuration for RM 28.1.2?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Carmelo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 Apr 2020 08:21:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Oscillator-and-SPLL-guidelines-S32K144/m-p/742543#M2010</guid>
      <dc:creator>carmelo_salva</dc:creator>
      <dc:date>2020-04-10T08:21:59Z</dc:date>
    </item>
  </channel>
</rss>

