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    <title>S32KのトピックRe: S32K Trigger Interrupt via Software</title>
    <link>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583955#M20064</link>
    <description>&lt;P&gt;Thanks &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57959"&gt;@Robin_Shen&lt;/a&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 17 Jan 2023 12:01:26 GMT</pubDate>
    <dc:creator>Jeniffer</dc:creator>
    <dc:date>2023-01-17T12:01:26Z</dc:date>
    <item>
      <title>S32K Trigger Interrupt via Software</title>
      <link>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583712#M20050</link>
      <description>&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;I am using S32K116 micro controller. I am using Cortex M0. I am looking in to documentation and can not find how to: trigger interrupt via software&lt;/P&gt;&lt;P&gt;I want trigger interrupt handler function but there is not NVIC register for this work.&lt;/P&gt;&lt;P&gt;For example, can I trigger the LPSPI0_IRQHandlerfunction on my own request? or LPUART0_RxTx_IRQHandler.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Cortex M4 has &lt;SPAN&gt;NVIC-&amp;gt;STIR&lt;/SPAN&gt; and &lt;SPAN&gt;SCB-&amp;gt;CCR&lt;/SPAN&gt; for that.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;EM&gt;SCB-&amp;gt;CCR - USERSETMPEND[1:1]: Controls unprivileged access to STIR. Should be 1 to trigger interrupt in unprivileged mode.&lt;/EM&gt;&lt;/LI&gt;&lt;LI&gt;&lt;EM&gt;NVIC-&amp;gt;STIR - INTID[8:0]: Triggers the interrupt of the written IRQ number.&lt;/EM&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 17 Jan 2023 07:22:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583712#M20050</guid>
      <dc:creator>Jeniffer</dc:creator>
      <dc:date>2023-01-17T07:22:08Z</dc:date>
    </item>
    <item>
      <title>Re: S32K Trigger Interrupt via Software</title>
      <link>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583853#M20058</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Jeniffer,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The core of S32K11x&amp;nbsp;is ARM Cortex M0+, so have a look at&amp;nbsp;&lt;A href="https://developer.arm.com/documentation/dui0662/b/Cortex-M0--Peripherals/Nested-Vectored-Interrupt-Controller/Interrupt-Set-Pending-Register?lang=en" target="_self"&gt;NVIC_ISPR&lt;/A&gt;&amp;nbsp;in Cortex-M0+ Devices Generic User Guide.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;BR /&gt;Robin&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 17 Jan 2023 09:12:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583853#M20058</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2023-01-17T09:12:36Z</dc:date>
    </item>
    <item>
      <title>Re: S32K Trigger Interrupt via Software</title>
      <link>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583955#M20064</link>
      <description>&lt;P&gt;Thanks &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/57959"&gt;@Robin_Shen&lt;/a&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 17 Jan 2023 12:01:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-Trigger-Interrupt-via-Software/m-p/1583955#M20064</guid>
      <dc:creator>Jeniffer</dc:creator>
      <dc:date>2023-01-17T12:01:26Z</dc:date>
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