topic Re: S32K144 HSRUN mode setting in S32K

S32K144 HSRUN mode setting

adhismadhyasta — Tue, 27 Mar 2018 13:29:15 GMT

Hi,

I have a question about S32K144 MCU code. I want to know how to use high-speed run mode in this MCU, I try to follow step by step from the user guide but it still not working. Below is a sample snippet of my code for clock setting :

void InitRunHSRUNModeforHSRUN (void) {
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000000;/*Disable SPLL*/

SCG->RCCR=SCG_RCCR_SCS(0b0011);
while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 3) {}
SCG->HCCR=SCG_HCCR_SCS(0b0011);
while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 3) {}
}

void AllowHSRUN (void){
SMC->PMPROT = 0x00000080;/*allow HSRUN mode*/
while(!(SMC->PMSTAT & 0x00000001u));/*wait MCU enter RUNmode*/
SMC->PMCTRL = 0x00000060;/*switch to high speed run mode*/
while(!(SMC->PMSTAT & 0x00000080u));/*wait MCU enter HSRUNmode*/

}

void SPLL_init_112MHz(void) {
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000000; /* SPLLEN=0: SPLL is disabled */
SCG->SPLLDIV = 0x00000302; /* SPLLDIV1 divide by 2 = 56MHz; SPLLDIV2 divide by 4 = 28MHz *//*SPLL_CLK = 112MHz*/
SCG->SPLLCFG = 0x000C0000; /* PREDIV=000: Divide SOSC_CLK by 1 */
/* MULT= 01100 : Multiply sys pll by 28 */
/* SPLL_CLK = 8MHz / 1 * 28 / 2 = 112 MHz */
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */
SCG->SPLLCSR = 0x00000001; /* LK=0: SPLLCSR can be written */
/* SPLLCMRE=0: SPLL CLK monitor IRQ if enabled */
/* SPLLCM=0: SPLL CLK monitor disabled */
/* SPLLSTEN=0: SPLL disabled in Stop modes */
/* SPLLEN=1: Enable SPLL */
while(!(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK)); /* Wait for SPLL valid */
}

void HighSpeedRUNmode (void) { /* Change to highspeed RUN mode with 8MHz SOSC, 112 MHz PLL*/
//while(0 == (SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); /* wait until ready and stable */
//SCG->RCCR=0x06010012; //SYS_CLK = 112Mhz, BUS_CLK = 56MHz, FLASH_CLK =28MHz
SCG->HCCR=SCG_HCCR_SCS(6) /* PLL as clock source*/
|SCG_HCCR_DIVCORE(0b01) /* DIVCORE=0, div. by 1: Core clock = 112Mhz */
|SCG_HCCR_DIVBUS(0b01) /* DIVBUS=1, div. by 2: bus clock = 56 MHz*/
|SCG_HCCR_DIVSLOW(0b10); /* DIVSLOW=3, div. by 4: SCG slow, flash clock= 28 MHz*/
while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 6) {} /* Wait for sys clk src = SPLL */

//SMC->PMCTRL = SMC_PMCTRL_RUNM(0b00); //enter RUN
}

I hope someone can help me to make HSRUN mode works. Thank you very much :smileyhappy:.
Adhistira.

Re: S32K144 HSRUN mode setting

dianabatrlova — Wed, 28 Mar 2018 11:49:42 GMT

Hi Adhis,

I recommend you chapter 38.4.3.3 High Speed Run (HSRUN) mode in the RM:
“
To enter HSRUN mode (with 112 MHz SPLL as clock source):
1. Disable SPLL. Configure FIRC as the RUN mode and HSRUN mode clock source
by writing 0011 to SCG_RCCR[SCS] and SCG_HCCR[SCS].
2. Configure PMPROT[AHSRUN] to allow HSRUN.
3. Write 11 to SMC_PMCTRL[RUNM] to enter HSRUN. (Now system will enter
HSRUN mode with FIRC configured as system clock source).
4. Reconfigure PLL for 112MHz and enable it.
5. Switch to PLL as the clock source by configuring SCG_HCCR[SCS] as 0110.
”

I tried put this code into the main function:

-at first I initialized OSC to 8MHz.

SCG->SPLLCSR = 0x00000000;/*Disable SPLL*/

SCG->RCCR=SCG_RCCR_SCS(0b0011); //Firc as the RUN mode

SCG->HCCR=SCG_HCCR_SCS(0b0011); //Firc as clock source

SMC->PMPROT|=SMC_PMPROT_AHSRUN_MASK; //Allow high speed run mode

SMC->PMCTRL=SMC_PMCTRL_RUNM(0x03); // Move to HSRUN Mode

// Wait for Transition

while(SMC->PMSTAT!=0x80);

SPll_init_112MHz();

HighSpeedRUNmode();

In the HighSpeedRUNmode(); function I changed DIVCORE value to 0 for divide by 1:

|SCG_HCCR_DIVCORE(0b00) /* DIVCORE=0, div. by 1: Core clock = 112Mhz */

I hope it helps you. If not, let me know.

Best regards,

Diana

Re: S32K144 HSRUN mode setting

adhismadhyasta — Thu, 29 Mar 2018 00:26:57 GMT

It is working, thank you very much :smileyhappy:.