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    <title>S32KのトピックS32K FTM Modified Combine Mode functionality</title>
    <link>https://community.nxp.com/t5/S32K/S32K-FTM-Modified-Combine-Mode-functionality/m-p/1567443#M19355</link>
    <description>&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;I'm using FTM module in Modified combine mode but I have a doubt with channel (n) match value.&lt;BR /&gt;In the Reference manual explain the possibility to set fixed a value for ch(n) and while ch(n+1) can be varied. Also the Driver function "FTM_DRV_UpdatePwmChannel" does not allow to change ch(n)&amp;nbsp; (it can be changed only if FTM counter is disabled).&lt;/P&gt;&lt;P&gt;I tried to use my function update procedure and I found that is possible to change ch(n) and ch(n+1) while FTM counter is enabled and I see the correct behavior on my scope for the PMW duty.&lt;/P&gt;&lt;P&gt;I don't see any advice against this variation on ch(n) match value&amp;nbsp;( as I said in RM there is only a fixed value use), but I like to be sure that is possible without any problem to perform this procedure.&lt;/P&gt;&lt;P&gt;Thank you for your help.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 09 Dec 2022 10:04:16 GMT</pubDate>
    <dc:creator>mario_casto</dc:creator>
    <dc:date>2022-12-09T10:04:16Z</dc:date>
    <item>
      <title>S32K FTM Modified Combine Mode functionality</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FTM-Modified-Combine-Mode-functionality/m-p/1567443#M19355</link>
      <description>&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;I'm using FTM module in Modified combine mode but I have a doubt with channel (n) match value.&lt;BR /&gt;In the Reference manual explain the possibility to set fixed a value for ch(n) and while ch(n+1) can be varied. Also the Driver function "FTM_DRV_UpdatePwmChannel" does not allow to change ch(n)&amp;nbsp; (it can be changed only if FTM counter is disabled).&lt;/P&gt;&lt;P&gt;I tried to use my function update procedure and I found that is possible to change ch(n) and ch(n+1) while FTM counter is enabled and I see the correct behavior on my scope for the PMW duty.&lt;/P&gt;&lt;P&gt;I don't see any advice against this variation on ch(n) match value&amp;nbsp;( as I said in RM there is only a fixed value use), but I like to be sure that is possible without any problem to perform this procedure.&lt;/P&gt;&lt;P&gt;Thank you for your help.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 09 Dec 2022 10:04:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FTM-Modified-Combine-Mode-functionality/m-p/1567443#M19355</guid>
      <dc:creator>mario_casto</dc:creator>
      <dc:date>2022-12-09T10:04:16Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FTM Modified Combine Mode functionality</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FTM-Modified-Combine-Mode-functionality/m-p/1568216#M19390</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;there was a discussion with the application team, and they do not see any issues here with C(n)V/C(n+1)V/MOD register update/synchronization in the modified combine mode. The description in RM is just rather a suggestion (the words is 'is intended to'). Anyway the recent driver implementation follows the RM suggestion.&lt;BR /&gt;If you create own code for CnV update it will be functional, as you confirmed.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
      <pubDate>Mon, 12 Dec 2022 10:38:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FTM-Modified-Combine-Mode-functionality/m-p/1568216#M19390</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2022-12-12T10:38:46Z</dc:date>
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