topic Re: Problems with the S32K144 FlexCAN message buffer in S32K

Problems with the S32K144 FlexCAN message buffer

JihongZhang — Thu, 10 Nov 2022 09:51:28 GMT

Hi,

I am programming the S32K144 FlexCAN, About whether this RAMn is a message cache buff?For example，I will reading the data,do I read it from the RAM section 0x80 to 0x87F?

Re: Problems with the S32K144 FlexCAN message buffer

JihongZhang — Thu, 10 Nov 2022 09:52:25 GMT

Re: Problems with the S32K144 FlexCAN message buffer

PetrS — Fri, 11 Nov 2022 12:19:06 GMT

Hi,

yes, from address offset 0x80 a message buffer (MB) space is allocated. To send and receive messages you need to set/read those MBs. See chapters 55.5.3-55.5.5 of the device Reference Manual to know the MB structure and a MBs address offset for different RAM block configuration (payload).

BR, Petr

Re: Problems with the S32K144 FlexCAN message buffer

JihongZhang — Mon, 14 Nov 2022 06:44:13 GMT

Hi PetrS,

Thank you for your answer.I have another question,What determines the size of FlexCAN RAM message buffer,such as the 16, 32, 64, and 128 parameters.As shown blow:

Re: Problems with the S32K144 FlexCAN message buffer

PetrS — Mon, 14 Nov 2022 12:32:13 GMT

Hi,

what is the document you are referring to?
Each individual MB is formed by 16, 24, 40, or 72 bytes, depending on the quantity of data bytes allocated for the message payload: 8, 16, 32, or 64 data bytes, respectively.
FlexCAN module of the S32K144 has 32MBs max.

BR, Petr

Re: Problems with the S32K144 FlexCAN message buffer

JihongZhang — Tue, 15 Nov 2022 02:11:41 GMT

Hi PetrS,

Thank you for your answer. I'm looking at the flexcan ug document.I read your reply, which means that the maximum MB parameter limit is determined by the chip design.