<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: LPSPI Voltage Levels in S32K</title>
    <link>https://community.nxp.com/t5/S32K/LPSPI-Voltage-Levels/m-p/1544988#M18568</link>
    <description>&lt;P&gt;It is given by use power supply rail and its configuration (5V or 3.3V). LPSPI pads can be on both supply levels, either VDD_HV_A or VDD_HV_B (pay attention to excel sheet S32K344_IOMUX.xlsx, embedded in the device’s RM).&lt;/P&gt;
&lt;P&gt;VIH/VIL you will find defined in DS, Table 22 and 23.&lt;/P&gt;
&lt;P&gt;VOH/VOL I have found it only indirectly stated within IOH and IOL specification as condition for this current measurement.&lt;/P&gt;
&lt;P&gt;For instance for IOH_33 condition is VOH &amp;gt;= VDD_HV_A/B - 0.7V&lt;/P&gt;
&lt;P&gt;It means V-I characteristic of the pin can be estimated by linear approximation between points and &amp;lt; IOH_33; VDD_HV_A/B - 0.7V&amp;gt; and &amp;lt;0mA ; VDD_HV_A/B&amp;gt;.&lt;/P&gt;
&lt;P&gt;The same way IOL_33 condition is VOL &amp;lt;= 0.7V.&lt;/P&gt;
&lt;P&gt;It implies V-I characteristic as &amp;lt; IOL_33 ; 0.7V &amp;gt; and &amp;lt; 0mA ; 0V &amp;gt;&lt;/P&gt;
&lt;P&gt;However it is expected that SPI output lines and connected to high impedance input, so you can just simplify it to expect VOH = VDD_HV_A/B and VOL = VSS (i.e. 0V).&lt;/P&gt;</description>
    <pubDate>Thu, 27 Oct 2022 11:01:14 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2022-10-27T11:01:14Z</dc:date>
    <item>
      <title>LPSPI Voltage Levels</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Voltage-Levels/m-p/1543892#M18539</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am having trouble interfacing S32K344 LPSPI with TMS570 mibSPI. What is the VIH, VOH, VIL, and VOL for S32K344 LPSPI SCK, CS, SOUT, and SIN pins?&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Pouya&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 26 Oct 2022 08:05:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Voltage-Levels/m-p/1543892#M18539</guid>
      <dc:creator>Psabouri</dc:creator>
      <dc:date>2022-10-26T08:05:30Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI Voltage Levels</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-Voltage-Levels/m-p/1544988#M18568</link>
      <description>&lt;P&gt;It is given by use power supply rail and its configuration (5V or 3.3V). LPSPI pads can be on both supply levels, either VDD_HV_A or VDD_HV_B (pay attention to excel sheet S32K344_IOMUX.xlsx, embedded in the device’s RM).&lt;/P&gt;
&lt;P&gt;VIH/VIL you will find defined in DS, Table 22 and 23.&lt;/P&gt;
&lt;P&gt;VOH/VOL I have found it only indirectly stated within IOH and IOL specification as condition for this current measurement.&lt;/P&gt;
&lt;P&gt;For instance for IOH_33 condition is VOH &amp;gt;= VDD_HV_A/B - 0.7V&lt;/P&gt;
&lt;P&gt;It means V-I characteristic of the pin can be estimated by linear approximation between points and &amp;lt; IOH_33; VDD_HV_A/B - 0.7V&amp;gt; and &amp;lt;0mA ; VDD_HV_A/B&amp;gt;.&lt;/P&gt;
&lt;P&gt;The same way IOL_33 condition is VOL &amp;lt;= 0.7V.&lt;/P&gt;
&lt;P&gt;It implies V-I characteristic as &amp;lt; IOL_33 ; 0.7V &amp;gt; and &amp;lt; 0mA ; 0V &amp;gt;&lt;/P&gt;
&lt;P&gt;However it is expected that SPI output lines and connected to high impedance input, so you can just simplify it to expect VOH = VDD_HV_A/B and VOL = VSS (i.e. 0V).&lt;/P&gt;</description>
      <pubDate>Thu, 27 Oct 2022 11:01:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-Voltage-Levels/m-p/1544988#M18568</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2022-10-27T11:01:14Z</dc:date>
    </item>
  </channel>
</rss>

