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    <title>topic S32 LPSPI0 PCS[2] not active in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731760#M1838</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;Hello folks,&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;I need to read out two ADC’s using the LPSPI0 module in the S32k144 controller. The ADC’s ship selects are connected to LPSPI_PCS0 and LPSPI_PCS2 respectively. While the 1st one works like a charm, I have difficulties with the latter. If the pin is set as a GPIO I can measure both High and Low level signals at the 2nd ADC’s chip select pin – thus output stage, trace, soldering, etc. should be fine.&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;However, if the pin is configured as PCS2 it remains low permanently – despite of the Active Low Setting.&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="PCS2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/4468i3B4279963DE21D08/image-size/large?v=v2&amp;amp;px=999" role="button" title="PCS2.png" alt="PCS2.png" /&gt;&lt;/span&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;In order to be sure, that&amp;nbsp;the code works correctly I tried to use PCS1 instead of PCS2. So the only difference in the code is basically two constants at the initialization: one for the pin itself and one for the SPI module (whichPcs).&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="PCS1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/4593i345C66376E0E68F1/image-size/large?v=v2&amp;amp;px=999" role="button" title="PCS1.png" alt="PCS1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;In a perfect world I could just stay with PCS1. Unfortunately though, we need that particular pin for PWM out. Furthermore this is the 64pin variant, I have no access to LPSPI_PCS3.&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;Can this phenomenon caused by a chip level error?&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;(The ADC I’m using is ADC101S1 from TI. It needs 16 clk pulses to transmit data, and has no data input other than CS)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 08 Feb 2018 16:52:46 GMT</pubDate>
    <dc:creator>gellertbalogh</dc:creator>
    <dc:date>2018-02-08T16:52:46Z</dc:date>
    <item>
      <title>S32 LPSPI0 PCS[2] not active</title>
      <link>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731760#M1838</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;Hello folks,&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;I need to read out two ADC’s using the LPSPI0 module in the S32k144 controller. The ADC’s ship selects are connected to LPSPI_PCS0 and LPSPI_PCS2 respectively. While the 1st one works like a charm, I have difficulties with the latter. If the pin is set as a GPIO I can measure both High and Low level signals at the 2nd ADC’s chip select pin – thus output stage, trace, soldering, etc. should be fine.&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;However, if the pin is configured as PCS2 it remains low permanently – despite of the Active Low Setting.&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="PCS2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/4468i3B4279963DE21D08/image-size/large?v=v2&amp;amp;px=999" role="button" title="PCS2.png" alt="PCS2.png" /&gt;&lt;/span&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;In order to be sure, that&amp;nbsp;the code works correctly I tried to use PCS1 instead of PCS2. So the only difference in the code is basically two constants at the initialization: one for the pin itself and one for the SPI module (whichPcs).&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="PCS1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/4593i345C66376E0E68F1/image-size/large?v=v2&amp;amp;px=999" role="button" title="PCS1.png" alt="PCS1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;In a perfect world I could just stay with PCS1. Unfortunately though, we need that particular pin for PWM out. Furthermore this is the 64pin variant, I have no access to LPSPI_PCS3.&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;Can this phenomenon caused by a chip level error?&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;&lt;/P&gt;&lt;P style="margin: 0cm 0cm 10pt;"&gt;(The ADC I’m using is ADC101S1 from TI. It needs 16 clk pulses to transmit data, and has no data input other than CS)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Feb 2018 16:52:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731760#M1838</guid>
      <dc:creator>gellertbalogh</dc:creator>
      <dc:date>2018-02-08T16:52:46Z</dc:date>
    </item>
    <item>
      <title>Re: S32 LPSPI0 PCS[2] not active</title>
      <link>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731761#M1839</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have just used LPSPI0_PCS2 PTE6 (lpspi_transfer_s32k144 SDK 0.8.5 example) on S32K144-Q100 EVBs (0N47T, 0N57U) and it works.&lt;BR /&gt;We don’t have any board with S32K144 in 64-p package but the maskset is the same for all the packages, I assume you have 0N57U, so there should be no difference. Could you try the code with another board/MCU? Have you tried the SDK example?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Feb 2018 12:48:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731761#M1839</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2018-02-12T12:48:57Z</dc:date>
    </item>
    <item>
      <title>Re: S32 LPSPI0 PCS[2] not active</title>
      <link>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731762#M1840</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;Thank you for your answer. You have guessed well, the controller is indeed the FS32K144H FVLH 0N57U CTAB1732E.&lt;/P&gt;&lt;P&gt;Today I managed to put my hands on two additional PCBs, unfortunately they produce the same behaviour. I also managed to test our code with a test board (S32K144EVB-Q100X), strangely enough the issue presists. If you have a solution that works, I must assume that our config has some problems which I need to investigate.&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Feb 2018 16:25:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731762#M1840</guid>
      <dc:creator>gellertbalogh</dc:creator>
      <dc:date>2018-02-13T16:25:04Z</dc:date>
    </item>
    <item>
      <title>Re: S32 LPSPI0 PCS[2] not active</title>
      <link>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731763#M1841</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/gellertbalogh"&gt;gellertbalogh&lt;/A&gt;‌&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you check if output buffer is enabled and and source singal for that pin is the right one?&lt;/P&gt;&lt;P&gt;If you use SDK can you mention which version did you use in your project?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Razvan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Feb 2018 21:52:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731763#M1841</guid>
      <dc:creator>razva_tilimpea</dc:creator>
      <dc:date>2018-02-15T21:52:46Z</dc:date>
    </item>
    <item>
      <title>Re: S32 LPSPI0 PCS[2] not active</title>
      <link>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731764#M1842</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Razvan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We use our own code, no SDK. Can you help me where can I find that?&lt;/P&gt;&lt;P&gt;PTE6 is configured as PORT_MUX_ALT2, but I tried out all of the alternatives from 0 to 7. The config for the SPI module is the following:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="config.PNG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/18693i40630ACAC9277377/image-size/large?v=v2&amp;amp;px=999" role="button" title="config.PNG" alt="config.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;(TCR switches between C0 and C2 depending on the CS active)&lt;/P&gt;&lt;P&gt;Honestly, I do not understand why changing only the chip select and touching nothing else changes behaviour. That the SPI works with PCS0 and PCS1 gives me confidence about the code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the meantime I implemeted a software chip select by explicitly pulling PTE6 to high/low as a GPIO. The ADC seems to be operational. I do not like this solution though, as it involves additional polling. But at least it proves some results.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="PTE6.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/18784iE6E907AD766E5229/image-size/large?v=v2&amp;amp;px=999" role="button" title="PTE6.png" alt="PTE6.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Feb 2018 10:40:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32-LPSPI0-PCS-2-not-active/m-p/731764#M1842</guid>
      <dc:creator>gellertbalogh</dc:creator>
      <dc:date>2018-02-20T10:40:46Z</dc:date>
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