S32KのトピックeDMA logic link channel https://community.nxp.com/t5/S32K/eDMA-logic-link-channel/m-p/1516045#M17472 <P>Hello NXP experts !</P><P>&nbsp;</P><P>I need some help with eDMA. Please explain me what does Logic link channel is and give me a use case example (not necessary code). Reference manual description is not that clear regarding this matter.</P><P>Where is a description of what the option in configuration tool do ??</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kyf_0-1662101570531.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/192263iC8D0E6BFC5496DB7/image-size/medium?v=v2&amp;px=400" role="button" title="kyf_0-1662101570531.png" alt="kyf_0-1662101570531.png" /></span></P><P>&nbsp;</P><P>&nbsp;</P><P>Kind regards,</P><P>kyf</P> Fri, 02 Sep 2022 06:54:58 GMT kyf 2022-09-02T06:54:58Z eDMA logic link channel https://community.nxp.com/t5/S32K/eDMA-logic-link-channel/m-p/1516045#M17472 <P>Hello NXP experts !</P><P>&nbsp;</P><P>I need some help with eDMA. Please explain me what does Logic link channel is and give me a use case example (not necessary code). Reference manual description is not that clear regarding this matter.</P><P>Where is a description of what the option in configuration tool do ??</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="kyf_0-1662101570531.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/192263iC8D0E6BFC5496DB7/image-size/medium?v=v2&amp;px=400" role="button" title="kyf_0-1662101570531.png" alt="kyf_0-1662101570531.png" /></span></P><P>&nbsp;</P><P>&nbsp;</P><P>Kind regards,</P><P>kyf</P> Fri, 02 Sep 2022 06:54:58 GMT https://community.nxp.com/t5/S32K/eDMA-logic-link-channel/m-p/1516045#M17472 kyf 2022-09-02T06:54:58Z Re: eDMA logic link channel https://community.nxp.com/t5/S32K/eDMA-logic-link-channel/m-p/1517000#M17533 <P>Hi,</P> <P>channel linking is a mechanism in which one channel initiates&nbsp;a service request for another channel (sets the TCDn_CSR[START] field of that channel)&nbsp;upon the major or minor loop completion.<BR />Read chapter&nbsp;14.4.7 Channel linking of the S32K3 RM.</P> <P>BR, Petr</P> Mon, 05 Sep 2022 10:54:10 GMT https://community.nxp.com/t5/S32K/eDMA-logic-link-channel/m-p/1517000#M17533 PetrS 2022-09-05T10:54:10Z