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    <title>topic Usage of CSE to implement AES128 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720942#M1676</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am planning to use S32K144 controller for one of our projects.&lt;/P&gt;&lt;P&gt;We have AES128 Algorithm to be implemented in the project. I understand, CSE is available in S32K144 and same can be used for implementing AES128.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But could not find much info on how to use this. Please let me know if any application note&amp;nbsp;available that explain the usage of CSE for implementing AES128 algorithm.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 20 Nov 2017 11:25:09 GMT</pubDate>
    <dc:creator>kavithakakarla</dc:creator>
    <dc:date>2017-11-20T11:25:09Z</dc:date>
    <item>
      <title>Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720942#M1676</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am planning to use S32K144 controller for one of our projects.&lt;/P&gt;&lt;P&gt;We have AES128 Algorithm to be implemented in the project. I understand, CSE is available in S32K144 and same can be used for implementing AES128.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But could not find much info on how to use this. Please let me know if any application note&amp;nbsp;available that explain the usage of CSE for implementing AES128 algorithm.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Nov 2017 11:25:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720942#M1676</guid>
      <dc:creator>kavithakakarla</dc:creator>
      <dc:date>2017-11-20T11:25:09Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720943#M1677</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Please refer to&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5401.pdf"&gt;AN5401 Getting Started with&amp;nbsp;CSEc Security Module&lt;/A&gt;.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note-software/AN5401SW.zip"&gt;AN5401SW.zip&lt;/A&gt;&amp;nbsp;contains an example Code for AES-128 Encoding and Decoding&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Nov 2017 12:20:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720943#M1677</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2017-11-23T12:20:12Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720944#M1678</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried using the above sample code.I am using Configuration of CSE module in S32K144 and also on S32K148.&lt;/P&gt;&lt;P&gt;After program partition command execution i see below behavior&lt;/P&gt;&lt;P&gt;1. ACCERR bit set&lt;/P&gt;&lt;P&gt;2. FCNG-&amp;gt;EEERDY bit is not set&lt;/P&gt;&lt;P&gt;using same code as provided.&lt;/P&gt;&lt;P&gt;Tried other command 0x41 which is working fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you please tell me any modification is required for the sample code or any other checks needs to be done.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is an reset happened after complete run is executed in debugger.This is happening while waiting for CCIF bit to set after command execution.Reset register indicate Core Lockup issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sudarshan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Mar 2018 09:19:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720944#M1678</guid>
      <dc:creator>sudarshankumar</dc:creator>
      <dc:date>2018-03-22T09:19:41Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720945#M1679</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Do you run the examples from RAM?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Mar 2018 20:52:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720945#M1679</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2018-03-22T20:52:08Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720946#M1680</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried to run it in RAM, core lockup is not happening, but i could see ACCERR bit is always set after Partition request and&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;FCNG-&amp;gt;EEERDY bit is not set&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sudarshan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Mar 2018 12:55:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720946#M1680</guid>
      <dc:creator>sudarshankumar</dc:creator>
      <dc:date>2018-03-23T12:55:14Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720947#M1681</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Sudarshan,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Could you please check if the device you are using has security support, by checking the value of the&amp;nbsp;&lt;STRONG&gt;SIM_SDID&lt;/STRONG&gt; register?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Veronica&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Apr 2018 13:53:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720947#M1681</guid>
      <dc:creator>veronicavelciu</dc:creator>
      <dc:date>2018-04-02T13:53:52Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720948#M1682</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Veronica,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SDID register is returning 0 value after reset and if am in break point read is not possible(Embsys register read).&lt;/P&gt;&lt;P&gt;I have question partition command has any dependencies if device supports CSE or not.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sudarshan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Apr 2018 07:35:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720948#M1682</guid>
      <dc:creator>sudarshankumar</dc:creator>
      <dc:date>2018-04-09T07:35:15Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720949#M1683</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Hello&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px; font-weight: inherit;"&gt;Sudarshan,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Program partition command should work even if the device does not support CSEc, but the&amp;nbsp;&lt;STRONG&gt;CSEc Key Size&amp;nbsp;&lt;/STRONG&gt;parameter of the command must be 0 in this case.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px; font-weight: inherit;"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px; font-weight: inherit;"&gt;Veronica&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Apr 2018 07:36:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720949#M1683</guid>
      <dc:creator>veronicavelciu</dc:creator>
      <dc:date>2018-04-11T07:36:16Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720950#M1684</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Veronica,&lt;/P&gt;&lt;P&gt;Now i got Q100 EVB and i ran only partition command and i could see partition is happening EEERDY bit is set also Secured.&lt;/P&gt;&lt;P&gt;After reset i am not able to connect debugger, looks like controller is locked.&lt;/P&gt;&lt;P&gt;I tried Emergency Kinetics Device Recovery by Full Chip Erase&lt;/P&gt;&lt;P&gt;Can you tell me how can reset it to unsecure mode&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Apr 2018 09:12:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720950#M1684</guid>
      <dc:creator>sudarshankumar</dc:creator>
      <dc:date>2018-04-11T09:12:44Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720951#M1685</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Hello&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px; font-weight: inherit;"&gt;Sudarshan,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Could you please explain exactly the steps you followed? Did you run an Erase All Blocks command prior to running the Program Partition command? Did you run Program Partition command using 0 for&amp;nbsp;&lt;STRONG style="border: 0px; font-weight: bold;"&gt;CSEc Key Size&lt;/STRONG&gt;?&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px; font-weight: inherit;"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px; font-weight: inherit;"&gt;Veronica&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Apr 2018 11:36:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720951#M1685</guid>
      <dc:creator>veronicavelciu</dc:creator>
      <dc:date>2018-04-11T11:36:04Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720952#M1686</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Veronica,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Main function i ran below code&lt;/P&gt;&lt;P&gt;1. Erase all block (0x44)&lt;/P&gt;&lt;P&gt;2. Program Partition Command (0x81) with key value 03(20 keys)&lt;/P&gt;&lt;P&gt;3. Checked in while for security enable was success&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now debug access is not possible, RESET LED is continuously to ON.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I could see start up file has below values assigned and section start address is 0x400&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Flash Configuration */&lt;BR /&gt; .section .FlashConfig, "a"&lt;BR /&gt; .long 0xFFFFFFFF /* 8 bytes backdoor comparison key */&lt;BR /&gt; .long 0xFFFFFFFF /* */&lt;BR /&gt; .long 0xFFFFFFFF /* 4 bytes program flash protection bytes */&lt;BR /&gt; .long 0xFFFF7FFE /* FDPROT:FEPROT:FOPT:FSEC(0xFE = unsecured) */&lt;/P&gt;&lt;P&gt;I am using S32K144EVB Q100 board&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By using&amp;nbsp;MDM-AP register is it possible to set mass erase or "flash from file" option can help?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sudarshan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Apr 2018 15:18:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720952#M1686</guid>
      <dc:creator>sudarshankumar</dc:creator>
      <dc:date>2018-04-11T15:18:57Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720953#M1687</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Sudarshan,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Please check the following note from the RM:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="note.PNG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/8514i86CC929BAEE8AC07/image-size/large?v=v2&amp;amp;px=999" role="button" title="note.PNG" alt="note.PNG" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;So, the flash configuration field you mentioned in your comment, would need to be written immediately after step 1 (erase all block), otherwise the chip will be secured after the next reset.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Considering the attached note, mass erase will not work anymore.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I would recommend using the &lt;EM&gt;csec_keyconfig&lt;/EM&gt; example in the S32 SDK, which shows how the Flash should be partitioned for CSEc usage.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Veronica&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Apr 2018 08:48:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720953#M1687</guid>
      <dc:creator>veronicavelciu</dc:creator>
      <dc:date>2018-04-13T08:48:43Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720954#M1688</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Hi Veronica,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Currently my EVB board i am not able to connect to debug mode, Is there any way i can execute mass erase.&lt;/P&gt;&lt;P&gt;Like trying JFlash tool to erase.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I checked for&amp;nbsp;1_Configure_part_and_Load_keys code and did same steps.&lt;/P&gt;&lt;P&gt;1.Only they do addition is load keys.&lt;/P&gt;&lt;P&gt;2.Erase All Blocks I have added extra before Partition.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Through EVB S32K144 SWD connector can i connect and debug?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Sudarshan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 13 Apr 2018 09:58:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720954#M1688</guid>
      <dc:creator>sudarshankumar</dc:creator>
      <dc:date>2018-04-13T09:58:04Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720955#M1689</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/danielmartynek"&gt;danielmartynek&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; In the sample code, the key counter and attribute flags are being bit shifted before loading into PRAM for calculating M2. Could you please explain this? Can you please guide me to any documentation with respect to this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/81315iB16DB3E2386229B4/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 May 2019 12:06:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/720955#M1689</guid>
      <dc:creator>ummerkunnummalk</dc:creator>
      <dc:date>2019-05-16T12:06:52Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1438785#M14780</link>
      <description>&lt;P&gt;I cant open the link provided here. pls share the correct link&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5401.pdf" target="_blank" rel="nofollow noopener noreferrer"&gt;When I click this link: AN5401 Getting Started with&amp;nbsp;CSEc Security Module or&amp;nbsp;&lt;/A&gt;&lt;A href="https://www.nxp.com/docs/en/application-note-software/AN5401SW.zip" rel="nofollow noopener noreferrer" target="_blank"&gt;AN5401SW.zip&lt;/A&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5401.pdf" target="_blank" rel="nofollow noopener noreferrer"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/A&gt;&lt;SPAN&gt;System gives below response.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/175890i8F996C15D4A9FA2A/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="image.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Apr 2022 09:40:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1438785#M14780</guid>
      <dc:creator>Dhwani</dc:creator>
      <dc:date>2022-04-05T09:40:47Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1447508#M15067</link>
      <description>&lt;P&gt;Hi, I clicked and found out the link is not working anymore, can you share a working link again?&lt;/P&gt;</description>
      <pubDate>Fri, 22 Apr 2022 01:34:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1447508#M15067</guid>
      <dc:creator>Jack7</dc:creator>
      <dc:date>2022-04-22T01:34:39Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1458297#M15434</link>
      <description>&lt;P&gt;&lt;SPAN&gt;你好，我点击后发现链接失效了，你能再分享一个有效的链接吗？&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 16 May 2022 01:53:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1458297#M15434</guid>
      <dc:creator>884647067</dc:creator>
      <dc:date>2022-05-16T01:53:04Z</dc:date>
    </item>
    <item>
      <title>Re: Usage of CSE to implement AES128</title>
      <link>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1458299#M15435</link>
      <description>&lt;P&gt;Hi, I clicked and found out the link is not working anymore, can you share a working link again?&lt;/P&gt;</description>
      <pubDate>Mon, 16 May 2022 01:57:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Usage-of-CSE-to-implement-AES128/m-p/1458299#M15435</guid>
      <dc:creator>884647067</dc:creator>
      <dc:date>2022-05-16T01:57:34Z</dc:date>
    </item>
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