https://community.nxp.com/t5/S32K/Query-about-Disabling-Lockstep-core-in-S32K344/m-p/1496344#M16686 <P>1) Yes, if you program new DCF client with LOCKSTEP_EN = 0, it makes checker core as independent.</P> <P>2) Yes, it’ll behave as second core connected over separate XBAR port.</P> <P>Programming of DCF records is not trivial task but it is manageable. User would be aware that he can easily destroy the chip in case the programming is not done properly and the device may never exit from reset. It is simpler to order S32K324 that have decoupled cores by default, in other aspect it is the same.</P> Wed, 27 Jul 2022 11:46:15 GMT davidtosenovjan 2022-07-27T11:46:15Z https://community.nxp.com/t5/S32K/Query-about-Disabling-Lockstep-core-in-S32K344/m-p/1494539#M16606 <P>As per user guide to S32K3 Disable lockstep , if we disable lockstep CPU core using DCF records<BR />1. Are we able to use Checker core as an independent core?<BR />2. In terms of functionality &amp; Performance , will it behave as master core?</P> Mon, 25 Jul 2022 06:31:17 GMT https://community.nxp.com/t5/S32K/Query-about-Disabling-Lockstep-core-in-S32K344/m-p/1494539#M16606 Dharanidharan_S 2022-07-25T06:31:17Z https://community.nxp.com/t5/S32K/Query-about-Disabling-Lockstep-core-in-S32K344/m-p/1496344#M16686 <P>1) Yes, if you program new DCF client with LOCKSTEP_EN = 0, it makes checker core as independent.</P> <P>2) Yes, it’ll behave as second core connected over separate XBAR port.</P> <P>Programming of DCF records is not trivial task but it is manageable. User would be aware that he can easily destroy the chip in case the programming is not done properly and the device may never exit from reset. It is simpler to order S32K324 that have decoupled cores by default, in other aspect it is the same.</P> Wed, 27 Jul 2022 11:46:15 GMT https://community.nxp.com/t5/S32K/Query-about-Disabling-Lockstep-core-in-S32K344/m-p/1496344#M16686 davidtosenovjan 2022-07-27T11:46:15Z