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    <title>topic S32K344 NVM peripheral access. in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K344-NVM-peripheral-access/m-p/1491752#M16495</link>
    <description>&lt;P&gt;I am using S32K344 board &amp;amp; S32 design studio IDE. In that S32DS IDE has provide Fee_Example_S32K344 module project. Is that NVM peripheral access module? If anybody know about this NVM configuration please tell me!&lt;/P&gt;</description>
    <pubDate>Tue, 19 Jul 2022 11:37:23 GMT</pubDate>
    <dc:creator>Skannan</dc:creator>
    <dc:date>2022-07-19T11:37:23Z</dc:date>
    <item>
      <title>S32K344 NVM peripheral access.</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-NVM-peripheral-access/m-p/1491752#M16495</link>
      <description>&lt;P&gt;I am using S32K344 board &amp;amp; S32 design studio IDE. In that S32DS IDE has provide Fee_Example_S32K344 module project. Is that NVM peripheral access module? If anybody know about this NVM configuration please tell me!&lt;/P&gt;</description>
      <pubDate>Tue, 19 Jul 2022 11:37:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-NVM-peripheral-access/m-p/1491752#M16495</guid>
      <dc:creator>Skannan</dc:creator>
      <dc:date>2022-07-19T11:37:23Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 NVM peripheral access.</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-NVM-peripheral-access/m-p/1492335#M16516</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203876"&gt;@Skannan&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;There is C40 flash controller.&lt;BR /&gt;Please refer to the RM for more information about it:&lt;BR /&gt;Chapter 20 Embedded Flash Memory (c40asf).&lt;/P&gt;
&lt;P&gt;The RTD has low-level drivers (examples are labeled as Ip) and high-level MCAL drivers.&lt;/P&gt;
&lt;P&gt;FEE and FLS drivers are the high-level MCAL drivers for flash/eeprom.&lt;BR /&gt;Whereas C40 is a low-level flash driver.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1658309372339.png" style="width: 653px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187250i9D48B966D611A80F/image-dimensions/653x534?v=v2" width="653" height="534" role="button" title="danielmartynek_0-1658309372339.png" alt="danielmartynek_0-1658309372339.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Jul 2022 09:30:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-NVM-peripheral-access/m-p/1492335#M16516</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2022-07-20T09:30:15Z</dc:date>
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