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    <title>S32KのトピックRe: S32K142 Flash Double ECC Error Behavior</title>
    <link>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1491545#M16484</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;thanks for clarification. Now I am able to force a "real" double ECC error that leads to a Bus Fault by writing multiples times to the same flash address with different values without prior erase. When reading from this flash address afterwards, i see the Bus Fault as expected.&lt;/P&gt;&lt;P&gt;Thanks and best regards,&lt;/P&gt;&lt;P&gt;Dom&lt;/P&gt;</description>
    <pubDate>Tue, 19 Jul 2022 07:20:52 GMT</pubDate>
    <dc:creator>domdom</dc:creator>
    <dc:date>2022-07-19T07:20:52Z</dc:date>
    <item>
      <title>S32K142 Flash Double ECC Error Behavior</title>
      <link>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1490767#M16426</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;we are working on a S32K142 and try to force and test the behavior on double ECC errors in Flash memory. We refer to S32K1xx Series Reference Manual, Rev. 13, 04/2020 chapter 35.1.3.1 ECC Implementation for NVM (for S32K14x devices):&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;Any single-bit ECC errors are automatically corrected, and any double-bit ECC errors are&lt;BR /&gt;reflected onto FERSTAT[DFDIF] flag at the read access from Data Flash or Program&lt;BR /&gt;Flash. When the double-bit ECC error has occurred, the flash controller reports the error&lt;BR /&gt;to the AHB which causes a bus fault. If Bus fault interrupt is not enabled, the error is&lt;BR /&gt;handled by the Hard fault. After servicing the Bus fault (if enabled), the Double Bit Fault&lt;BR /&gt;Detect Interrupt is serviced (if enabled).&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Out assumption is, that the reporting of a double ECC error to AHB is done independent of activation or deactivation of the Flash Double Bit Fault Detect Interrupt (FERCNFG.DFDIE). Is that correct?&lt;/P&gt;&lt;P&gt;We are trying to force the error using the FERCNFG.FDFD bit and observe the following behavior:&lt;BR /&gt;1. When FERCNFG.DFDIE = 0 (Flash Double Bit Fault Detect Interrupt disabled), after forcing the error (FERCNFG.FDFD = 1) and access the Flash by instruction fetches or direct reads, neither a Bus Fault nor an escallated Hardfauld occurs ever.&lt;/P&gt;&lt;P&gt;2. When FERCNFG.DFDIE = 1 (Flash Double Bit Fault Detect Interrupt enabled), after forcing the error (FERCNFG.FDFD = 1) and access the Flash by instruction fetches or direct reads, the Flash Double Bit Fault Detect Interrupt is executed but we never see a Bus Fault or an escalated Hardfault.&lt;/P&gt;&lt;P&gt;We are using S32DS with S32K142_SDK 4.0.2 with GCC 6.3 and test on a S32K142 EVB. Please find a code snipped, how we try to force the Exception. Instruction Cache is disabled.&lt;/P&gt;&lt;LI-CODE lang="c"&gt;#include "sdk_project_config.h"

flash_ssd_config_t flashSsdConfig;

void HardFault_Handler(void)
{
	while(1)
	{
	}
}

void BusFault_Handler(void)
{
	while(1)
	{
	}
}

void FTFC_Fault_IRQHandler(void)
{
	FLASH_DRV_ForceDoubleBitFaultDetectCmd(false);
	FLASH_DRV_ClearDoubleBitFaultFlag();
//	while(1)
//	{
//	}
}

int main(void)
{
	status_t status;
	uint32_t flashStart;
	volatile uint8_t flashRead;

	status = CLOCK_DRV_Init(g_clockManConfigsArr[0]);
	status = FLASH_DRV_Init(&amp;amp;Flash_InitConfig0, &amp;amp;flashSsdConfig);

#if 1
	// Test 1: do not enable the ECC error interrupt of flash controller
//	FLASH_DRV_EnableDoubleBitFaultInterupt();
#else
	// Test 2: enable the ECC error interrupt of flash controller
	FLASH_DRV_EnableDoubleBitFaultInterupt();
#endif

	// activate force ECC error on next read from flash
	FLASH_DRV_ForceDoubleBitFaultDetectCmd(true);

	// fetch instructions from code flash to force ECC error
	__asm("nop");
	__asm("nop");
	__asm("nop");
	__asm("nop");
	__asm("nop");
	__asm("nop");

	// read from 256k flash to force ECC error
	volatile uint8_t* pFlash = (volatile uint8_t*)0x0;
	for(uint32_t i = 0; i &amp;lt; 0x40000; i++)
	{
		flashRead = *pFlash++;
	}

	while(1)
	{
	}
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We hope that anybody can clarify the behavior for us or to point on the thing we are missing here.&lt;/P&gt;&lt;P&gt;Thanks in advance for your help and best regards,&lt;/P&gt;&lt;P&gt;Dom&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 18 Jul 2022 05:50:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1490767#M16426</guid>
      <dc:creator>domdom</dc:creator>
      <dc:date>2022-07-18T05:50:48Z</dc:date>
    </item>
    <item>
      <title>Re: S32K142 Flash Double ECC Error Behavior</title>
      <link>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1491123#M16461</link>
      <description>&lt;P&gt;It is correct behavior.&lt;/P&gt;
&lt;P&gt;According to the RM, I don't think you will have a Bus Fault when you are using FDFD due to this bit emulates the setting of DFDIF to check the associated interrupt routine as RM describes&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="davidtosenovjan_0-1658156950222.png" style="width: 513px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187004i0E6716DD07DB605A/image-dimensions/513x132?v=v2" width="513" height="132" role="button" title="davidtosenovjan_0-1658156950222.png" alt="davidtosenovjan_0-1658156950222.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;So the Flash Controller will not report the error to AHB which causes the bus fault when a real double bit ECC error occurs, because there is not an ECC error in the Flash.&lt;/P&gt;
&lt;P&gt;In case you are injecting ECC error by flash over programming to generate ECC error in the flash memory itself, such reading will lead in bus or hard fault.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 18 Jul 2022 15:13:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1491123#M16461</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2022-07-18T15:13:14Z</dc:date>
    </item>
    <item>
      <title>Re: S32K142 Flash Double ECC Error Behavior</title>
      <link>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1491545#M16484</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;thanks for clarification. Now I am able to force a "real" double ECC error that leads to a Bus Fault by writing multiples times to the same flash address with different values without prior erase. When reading from this flash address afterwards, i see the Bus Fault as expected.&lt;/P&gt;&lt;P&gt;Thanks and best regards,&lt;/P&gt;&lt;P&gt;Dom&lt;/P&gt;</description>
      <pubDate>Tue, 19 Jul 2022 07:20:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K142-Flash-Double-ECC-Error-Behavior/m-p/1491545#M16484</guid>
      <dc:creator>domdom</dc:creator>
      <dc:date>2022-07-19T07:20:52Z</dc:date>
    </item>
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