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    <title>S32KのトピックRe: RDCOLERR bit is set</title>
    <link>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484786#M16216</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203136"&gt;@Sridhar07&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Are you really erasing a sector in DFlash?&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;uint32_t addr = 0x00800000;
/* addr [23] = 1, DFLASH block
   addr [16 - 0] = DFLASH address 0x0000 */

FTFC-&amp;gt;FCCOB[3] = 0x09; /* Erase sector */
FTFC-&amp;gt;FCCOB[2] = (uint8_t)(( addr &amp;amp; 0x00FF0000 ) &amp;gt;&amp;gt; 16 ); /* addr [23:16], addr[23] = 1 if DFLASH */
FTFC-&amp;gt;FCCOB[1] = (uint8_t)(( addr &amp;amp; 0x0000FF00 ) &amp;gt;&amp;gt; 8 );  /* addr [15:8] */
FTFC-&amp;gt;FCCOB[0] = (uint8_t)(( addr &amp;amp; 0x000000FF ) );       /* addr [7:0]  */&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 05 Jul 2022 16:13:46 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2022-07-05T16:13:46Z</dc:date>
    <item>
      <title>RDCOLERR bit is set</title>
      <link>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1483631#M16169</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;/P&gt;&lt;P&gt;Iam working with s32k148 controller.&lt;/P&gt;&lt;P&gt;iam trying to flash aplication from bootloader,but the flashing was not succesfull.&lt;/P&gt;&lt;P&gt;after mulitple attempts iam not able to flash ,as it throws FTFC error.&lt;/P&gt;&lt;P&gt;RDCOLERR bit is set,but i have not configured the FlexNVM (0x1000 0000 - 0x1007 FFFF)&lt;/P&gt;&lt;P&gt;This address has not been configured in my linker.&lt;/P&gt;&lt;P&gt;But after this error iam not able to resume my flashing.but i can flash my application directly via debugger(isystems debugger).&lt;/P&gt;&lt;P&gt;I tried Mass erase from my debugger,but still getting the same error.&lt;/P&gt;&lt;P&gt;during mass erase do i need to skip any particular memory regions??&lt;/P&gt;&lt;P&gt;How to resume my flashing ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 02 Jul 2022 14:21:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1483631#M16169</guid>
      <dc:creator>Sridhar07</dc:creator>
      <dc:date>2022-07-02T14:21:22Z</dc:date>
    </item>
    <item>
      <title>Re: RDCOLERR bit is set</title>
      <link>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484108#M16187</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203136"&gt;@Sridhar07&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The DFlash (FlexNVM) does not have to have a section in the linker file.&lt;/P&gt;
&lt;P&gt;By default, the FlexNVM is in DFlash (RAMRDY = 1) mode and it can be accessed by the FTFC controller.&lt;/P&gt;
&lt;P&gt;Please refer to the description of the flag.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1656943754848.png" style="width: 878px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/185484iD0EBF2C00BAD0E67/image-dimensions/878x172?v=v2" width="878" height="172" role="button" title="danielmartynek_0-1656943754848.png" alt="danielmartynek_0-1656943754848.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;According to the screenshot you posted, you are erasing a sector at 0x2D800, is that correct?&lt;/P&gt;
&lt;P&gt;There must be no other access to the 512KB flash block during the FTFC operation.&lt;/P&gt;
&lt;P&gt;Do you use RTD / SDK drivers?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 04 Jul 2022 14:16:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484108#M16187</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2022-07-04T14:16:11Z</dc:date>
    </item>
    <item>
      <title>Re: RDCOLERR bit is set</title>
      <link>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484191#M16195</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001"&gt;@danielmartynek&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;My application is placed at 0x28000.In fbl ,erase operation takes place but it is a synchronous operation and i dont believe there is chance to access this 512kb&amp;nbsp;&lt;SPAN&gt;(0x1000 0000 - 0x1007 FFFF) simultaneously during that time.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is there any possibility to check which address in the 512kb is being accessed during the erase operation.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Because those regions are not used anywhere in the sw&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Sridhar M&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Jul 2022 11:54:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484191#M16195</guid>
      <dc:creator>Sridhar07</dc:creator>
      <dc:date>2022-07-05T11:54:25Z</dc:date>
    </item>
    <item>
      <title>Re: RDCOLERR bit is set</title>
      <link>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484643#M16213</link>
      <description>&lt;P&gt;RTD drivers are not used&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Jul 2022 11:54:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484643#M16213</guid>
      <dc:creator>Sridhar07</dc:creator>
      <dc:date>2022-07-05T11:54:00Z</dc:date>
    </item>
    <item>
      <title>Re: RDCOLERR bit is set</title>
      <link>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484786#M16216</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203136"&gt;@Sridhar07&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Are you really erasing a sector in DFlash?&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;uint32_t addr = 0x00800000;
/* addr [23] = 1, DFLASH block
   addr [16 - 0] = DFLASH address 0x0000 */

FTFC-&amp;gt;FCCOB[3] = 0x09; /* Erase sector */
FTFC-&amp;gt;FCCOB[2] = (uint8_t)(( addr &amp;amp; 0x00FF0000 ) &amp;gt;&amp;gt; 16 ); /* addr [23:16], addr[23] = 1 if DFLASH */
FTFC-&amp;gt;FCCOB[1] = (uint8_t)(( addr &amp;amp; 0x0000FF00 ) &amp;gt;&amp;gt; 8 );  /* addr [15:8] */
FTFC-&amp;gt;FCCOB[0] = (uint8_t)(( addr &amp;amp; 0x000000FF ) );       /* addr [7:0]  */&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 05 Jul 2022 16:13:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDCOLERR-bit-is-set/m-p/1484786#M16216</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2022-07-05T16:13:46Z</dc:date>
    </item>
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