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    <title>topic Re: LPSPI burst interface in S32K</title>
    <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1483313#M16163</link>
    <description>&lt;P&gt;Hi Joost,&lt;/P&gt;
&lt;P&gt;here is the feedback I just got:&lt;/P&gt;
&lt;P&gt;"The TDBR is an alias, writing to any of those addresses is identical to writing to the TDR. There is no TDBR pointer or memory.&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;There are 2 main uses for this register:&lt;/P&gt;
&lt;UL class="lia-align-justify"&gt;
&lt;LI&gt;Perform burst write into the TDR using the DMA. The benefit of this depends on the DMA controller and system bus connections (eg: the bus structure is such that a single 16-byte burst is more efficient than 4 single 32-bit transfers).&lt;/LI&gt;
&lt;LI&gt;Use the DMA to write 32-bit to TCBR (setting up the command with respect to PCS, etc) and then increment into TDBR region for the data.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P class="lia-align-justify"&gt;So you can use those registers as the normal ones."&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Regards,&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Lukas&lt;/P&gt;</description>
    <pubDate>Fri, 01 Jul 2022 08:14:29 GMT</pubDate>
    <dc:creator>lukaszadrapa</dc:creator>
    <dc:date>2022-07-01T08:14:29Z</dc:date>
    <item>
      <title>LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1475111#M15959</link>
      <description>&lt;P&gt;We are investigating to use the burst interface of the LPSPI module of the S32K3xx MCU.&lt;/P&gt;&lt;P&gt;Is there any information or any example projects available that use this burst interface (TCBR, TDBR[0..127], RDBR[0..127] registers). The reference manual only writes that they are an alias of the normal registers (TCR, TDR and RDR) but there seems to be no information on how they can/should be used.&lt;/P&gt;&lt;P&gt;Some more specific questions:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;What defines the moment at which an element from the TDBR register is pushed to the TDR FIFO&lt;/LI&gt;&lt;LI&gt;Does the LPSPI module keep an internal pointer to the current active element in the TDBR/RDBR register?&lt;/LI&gt;&lt;LI&gt;Can we reuse the content of the TDBR register after a burst has finished (to send the same burst of TX SPI commands again)?&lt;/LI&gt;&lt;/UL&gt;</description>
      <pubDate>Thu, 16 Jun 2022 07:39:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1475111#M15959</guid>
      <dc:creator>joohau</dc:creator>
      <dc:date>2022-06-16T07:39:23Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1478943#M16043</link>
      <description>&lt;P&gt;Hi Joost,&lt;/P&gt;
&lt;P&gt;I had to ask for the details because it's really missing in the reference manual. I'm afraid it will take more time. I will let you know later. Thanks for patience.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Thu, 23 Jun 2022 09:14:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1478943#M16043</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2022-06-23T09:14:29Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1479640#M16061</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;do you have an update on this?&lt;BR /&gt;I'm also investigating the use of the TDBR register.&lt;/P&gt;</description>
      <pubDate>Fri, 24 Jun 2022 07:12:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1479640#M16061</guid>
      <dc:creator>R20220311</dc:creator>
      <dc:date>2022-06-24T07:12:01Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1479709#M16067</link>
      <description>&lt;P&gt;Hi Rob,&lt;/P&gt;
&lt;P&gt;not yet. It was forwarded to design team and I'm afraid it will take a couple of days.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Fri, 24 Jun 2022 08:31:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1479709#M16067</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2022-06-24T08:31:39Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1483313#M16163</link>
      <description>&lt;P&gt;Hi Joost,&lt;/P&gt;
&lt;P&gt;here is the feedback I just got:&lt;/P&gt;
&lt;P&gt;"The TDBR is an alias, writing to any of those addresses is identical to writing to the TDR. There is no TDBR pointer or memory.&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;There are 2 main uses for this register:&lt;/P&gt;
&lt;UL class="lia-align-justify"&gt;
&lt;LI&gt;Perform burst write into the TDR using the DMA. The benefit of this depends on the DMA controller and system bus connections (eg: the bus structure is such that a single 16-byte burst is more efficient than 4 single 32-bit transfers).&lt;/LI&gt;
&lt;LI&gt;Use the DMA to write 32-bit to TCBR (setting up the command with respect to PCS, etc) and then increment into TDBR region for the data.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P class="lia-align-justify"&gt;So you can use those registers as the normal ones."&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Regards,&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Fri, 01 Jul 2022 08:14:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1483313#M16163</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2022-07-01T08:14:29Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1484038#M16184</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;thanks for the answer.&lt;BR /&gt;&lt;BR /&gt;Is it possible to ask for an Reference Manual update to include this explanation. Furthermore would it be possible to add a simple example in the reference manual explaining the use of these burst registers.&lt;/P&gt;</description>
      <pubDate>Mon, 04 Jul 2022 11:32:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1484038#M16184</guid>
      <dc:creator>R20220311</dc:creator>
      <dc:date>2022-07-04T11:32:26Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI burst interface</title>
      <link>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1487186#M16290</link>
      <description>&lt;P&gt;Sure, I will ask for that.&lt;/P&gt;</description>
      <pubDate>Mon, 11 Jul 2022 04:51:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/LPSPI-burst-interface/m-p/1487186#M16290</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2022-07-11T04:51:06Z</dc:date>
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