<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic About HW-Trigger ADC in S32K</title>
    <link>https://community.nxp.com/t5/S32K/About-HW-Trigger-ADC/m-p/715944#M1603</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I configure a hardware trigger for ADC0 with&amp;nbsp;FTM2_INIT_TRIG -&amp;gt;&amp;nbsp;PDB0_trigger_in0(back to back) -&amp;gt;&amp;nbsp; ADC0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is ADC channel info: &lt;BR /&gt; ADC0-&amp;gt;SC1[0] = ADC_SC1_ADCH(ADC0SE15);&lt;BR /&gt; ADC0-&amp;gt;SC1[1] = ADC_SC1_ADCH(ADC0SE8);&amp;nbsp;&lt;BR /&gt; ADC0-&amp;gt;SC1[2] = ADC_SC1_ADCH(ADC0SE9);&lt;BR /&gt; ADC0-&amp;gt;SC1[3] = ADC_SC1_ADCH(ADC0SE14);&amp;nbsp;&lt;BR /&gt; ADC0-&amp;gt;SC1[4] = ADC_SC1_ADCH(ADC0SE11);&lt;BR /&gt; ADC0-&amp;gt;SC1[5] = ADC_SC1_AIEN_MASK|ADC_SC1_ADCH(ADC0SE6);&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TRGMUX configuration:&lt;/P&gt;&lt;P&gt;TRGMUX-&amp;gt;TRGMUXn[TRGMUX_PDB0_INDEX] = TRGMUX_TRGMUXn_SEL0(TRGMUX_TRIG_SOURCE_FTM2_INIT_TRIG);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TRGMUX configuration:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;PDB0-&amp;gt;CH[0].C1 = PDB_C1_BB(0x3E) | /* back-to-back enable: 0b0011 1110 */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PDB_C1_TOS(1) | /* Pretrigger Output Select: 0=bypassed , 1=enabled */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PDB_C1_EN(0x3F); /* PDB channel's [3:0] pre-trigger enabled */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And &lt;SPAN&gt;I&amp;nbsp;find there are&amp;nbsp;some strange pulses on &lt;SPAN&gt;ADC0SE15 (PTC17/ADC0_SE15/FTM1_FLT3) pin.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;Anybody knowes why there are pulses?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;The MCU is s32k144 with 64 pins.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="2018-01-12_15-32-55.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/3572iF00DC59BCAA2EFE2/image-size/large?v=v2&amp;amp;px=999" role="button" title="2018-01-12_15-32-55.png" alt="2018-01-12_15-32-55.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 12 Jan 2018 08:03:52 GMT</pubDate>
    <dc:creator>ray_xie</dc:creator>
    <dc:date>2018-01-12T08:03:52Z</dc:date>
    <item>
      <title>About HW-Trigger ADC</title>
      <link>https://community.nxp.com/t5/S32K/About-HW-Trigger-ADC/m-p/715944#M1603</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I configure a hardware trigger for ADC0 with&amp;nbsp;FTM2_INIT_TRIG -&amp;gt;&amp;nbsp;PDB0_trigger_in0(back to back) -&amp;gt;&amp;nbsp; ADC0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is ADC channel info: &lt;BR /&gt; ADC0-&amp;gt;SC1[0] = ADC_SC1_ADCH(ADC0SE15);&lt;BR /&gt; ADC0-&amp;gt;SC1[1] = ADC_SC1_ADCH(ADC0SE8);&amp;nbsp;&lt;BR /&gt; ADC0-&amp;gt;SC1[2] = ADC_SC1_ADCH(ADC0SE9);&lt;BR /&gt; ADC0-&amp;gt;SC1[3] = ADC_SC1_ADCH(ADC0SE14);&amp;nbsp;&lt;BR /&gt; ADC0-&amp;gt;SC1[4] = ADC_SC1_ADCH(ADC0SE11);&lt;BR /&gt; ADC0-&amp;gt;SC1[5] = ADC_SC1_AIEN_MASK|ADC_SC1_ADCH(ADC0SE6);&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TRGMUX configuration:&lt;/P&gt;&lt;P&gt;TRGMUX-&amp;gt;TRGMUXn[TRGMUX_PDB0_INDEX] = TRGMUX_TRGMUXn_SEL0(TRGMUX_TRIG_SOURCE_FTM2_INIT_TRIG);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;TRGMUX configuration:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;PDB0-&amp;gt;CH[0].C1 = PDB_C1_BB(0x3E) | /* back-to-back enable: 0b0011 1110 */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PDB_C1_TOS(1) | /* Pretrigger Output Select: 0=bypassed , 1=enabled */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PDB_C1_EN(0x3F); /* PDB channel's [3:0] pre-trigger enabled */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And &lt;SPAN&gt;I&amp;nbsp;find there are&amp;nbsp;some strange pulses on &lt;SPAN&gt;ADC0SE15 (PTC17/ADC0_SE15/FTM1_FLT3) pin.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;Anybody knowes why there are pulses?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;The MCU is s32k144 with 64 pins.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="2018-01-12_15-32-55.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/3572iF00DC59BCAA2EFE2/image-size/large?v=v2&amp;amp;px=999" role="button" title="2018-01-12_15-32-55.png" alt="2018-01-12_15-32-55.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 12 Jan 2018 08:03:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/About-HW-Trigger-ADC/m-p/715944#M1603</guid>
      <dc:creator>ray_xie</dc:creator>
      <dc:date>2018-01-12T08:03:52Z</dc:date>
    </item>
  </channel>
</rss>

