topic Re: SM_048 Implementation in S32K

SM_048 Implementation

manish_singh — Mon, 23 May 2022 09:46:00 GMT

As per S32K1xx Series Safety Manual, Rev. 4, 09/2018 document for SM_048, DBG bit in the Watchdog Control and Status Register (CS) should be set to 1 and we are also using LPIT then LPIT_MCR[DBG_EN] = 1.

I am able to set the DBG bit to 1 by configuring the Wdg Run in debug mode parameter as shown below

but when I try to set LPIT_MCR[DBG_EN] = 1, then my application is continuously resetting and LPIT_MCR[DBG_EN] bit is never getting set to 1.

Can you please let me know the correct procedure to set LPIT_MCR[DBG_EN] bit and also the implementation support to meet SM_048 requirement.

Re: SM_048 Implementation

danielmartynek — Tue, 24 May 2022 12:44:42 GMT

Hi @manish_singh,

How do you configure the LPIT module?

Do you follow the steps in Table 48-4. Initializing the LPIT modul?

Anyway, when the MCU is in the active debug mode and the core is halted, the WDOG (with DBG = 1) cannot be refreshed, therefore the WDOG will reset the MCU.

Regarding SM_048, please read it in the context of the whole Section 5.6.2.1 Debug mode.

"The debugging facilities of the S32K1xx and S32K14xW pose a possible source of failures if they are activated during the operation of functional safety-relevant applications."

That is why we can have certain modules active even in this active debug mode, and in this case, the WDOG can reset the MCU.

Regards,

Daniel

Re: SM_048 Implementation

manish_singh — Fri, 27 May 2022 12:47:24 GMT

Hi Daniel,

I am able to set LPIT_MCR[DBG_EN] bit to 1, but I am not able to set WDOG ->CS[DBG] = 1 from the code, these bits are only getting set only from the configuration, is there any way I can set it manually.

Source code I am using to set the WDOG ->CS[DBG] = 1

WDOG ->CS = 0x0000A5A4;

Re: SM_048 Implementation

danielmartynek — Fri, 27 May 2022 12:56:03 GMT

Hi @manish_singh,

In the initial initialization of the WDOG, you need to set the UPDATE bit.

So, before you write the register, read it first, is UPDATE = 1?

Thanks,

BR, Daniel

Re: SM_048 Implementation

manish_singh — Fri, 27 May 2022 12:58:43 GMT

Hi @danielmartynek

Yes, I have checked this condition but then also I was not able to set it.

Re: SM_048 Implementation

danielmartynek — Fri, 27 May 2022 13:23:56 GMT

I forgot to mention that the WDOG must be unlocked first.

Re: SM_048 Implementation

manish_singh — Fri, 27 May 2022 13:20:04 GMT

@danielmartynek

I will try the suggested solution and update you.

Re: SM_048 Implementation

manish_singh — Mon, 30 May 2022 04:49:34 GMT

@danielmartynek

I have tried the suggested solution but I am not able to set WDOG ->CS[DBG] = 1, kindly find the below code for reference

Re: SM_048 Implementation

danielmartynek — Mon, 30 May 2022 09:03:53 GMT

Hello Manish,

Please double-check the code, it clears both DBG and UPDATE.

BR, Daniel

Re: SM_048 Implementation

manish_singh — Thu, 02 Jun 2022 03:50:32 GMT

@danielmartynek

I have updated the code but then also it was not getting set. Can we have a meeting to discuss on this ?

Re: SM_048 Implementation

danielmartynek — Thu, 02 Jun 2022 08:24:34 GMT

Hello @manish_singh,

Please keep in mind that if the WDOG is enabled in the debug mode, and the core is halted by the debugger, the WDOG does not get refreshed, and the MCU is then reset.

Can you scope the reset_b signal while you are testing it?

Thank you,

BR, Daniel